公开(公告)号：US20190023561A1

公开(公告)日：2019-01-24

申请号：US15653234

申请日：2017-07-18

Applicant: Infineon Technologies AG

Inventor： Sook Woon Chan ,  Chau Fatt Chiang ,  Kok Yau Chua ,  Swee Kah Lee ,  Chee Yang Ng

IPC: B81B7/00 ,  B81B7/02 ,  G01L19/00 ,  B81C1/00

Abstract: An embodiment device includes a body structure having an interior cavity, a control chip disposed on a first interior surface of the interior cavity, and a sensor attached, at a first side, to a second interior surface of the interior cavity opposite the first interior surface. The sensor has a mounting pad on a second side of the sensor that faces the first interior surface, and the sensor is vertically spaced apart from the control chip by an air gap, with the sensor is aligned at least partially over the control chip. The device further includes an interconnect having a first end mounted on the mounting pad, the interconnect extending through the interior cavity toward the first interior surface, and the control chip is in electrical communication with the sensor by way of the interconnect.

公开(公告)号：US10163812B2

公开(公告)日：2018-12-25

申请号：US15297744

申请日：2016-10-19

Applicant: Infineon Technologies AG

Inventor： Chau Fatt Chiang ,  Kok Yau Chua ,  Swee Kah Lee ,  Chee Yang Ng ,  Valentyn Solomko

IPC: H01L23/498 ,  H01L23/552 ,  H01L21/48 ,  H01L21/56 ,  H01L23/31 ,  H01L23/367 ,  H01L23/66 ,  H01L23/00

Abstract: A device includes a substrate that includes conductive structures and has a first surface that is opposite to a second surface. Conductive pillars are built up over and electrically coupled to at least one of the conductive structures. An integrated circuit is disposed over the first surface and electrically coupled to the conductive structures. A molding compound is formed over the first surface of the substrate.

公开(公告)号：US09117807B2

公开(公告)日：2015-08-25

申请号：US13951549

申请日：2013-07-26

Applicant: Infineon Technologies AG

Inventor： Chee Yang Ng

IPC: H01L23/50 ,  H01L21/70 ,  H01L23/495 ,  H01L21/56 ,  H01L23/28 ,  H01L23/498 ,  H01L21/48 ,  H01L23/31

CPC classification number: H01L23/49503 ,  H01L21/4853 ,  H01L21/56 ,  H01L23/28 ,  H01L23/3121 ,  H01L23/49531 ,  H01L23/49575 ,  H01L23/49816 ,  H01L23/49822 ,  H01L25/16 ,  H01L2224/48137

Abstract: An integrated passives package includes an encapsulation compound and a plurality of electrically conductive pads embedded in the encapsulation compound. Each of the pads has opposing first and second sides. The first side of the pads is uncovered by the encapsulation compound and forms array of external electrical connections at a first side of the package. The integrated passives package further includes a plurality of passive components embedded in the encapsulation compound. Each of the passive components has a first terminal attached to one of the pads and a second terminal attached to a different one the pads at the second side of the pads. Corresponding semiconductor modules and methods of manufacturing are also provided.

Abstract translation: 集成无源器件封装包括封装化合物和嵌入在封装化合物中的多个导电焊盘。 每个垫具有相对的第一和第二面。 衬垫的第一侧被封装化合物覆盖，并在封装的第一侧形成外部电连接的阵列。 集成无源组件还包括嵌入在封装化合物中的多个无源部件。 每个无源部件具有附接到焊盘之一的第一端子和附接到焊盘第二侧上的不同焊盘的第二端子。 还提供了相应的半导体模块和制造方法。

公开(公告)号：US20150146894A1

公开(公告)日：2015-05-28

申请号：US14088747

申请日：2013-11-25

Applicant: Infineon Technologies AG

Inventor： Chee Yang Ng

IPC: H04R1/08 ,  B81C1/00

CPC classification number: H04R19/005 ,  B81B2201/0257 ,  B81C1/0023 ,  B81C1/00238 ,  H01L2224/16245 ,  H01L2224/48091 ,  H01L2224/48145 ,  H01L2224/48247 ,  H01L2224/48471 ,  H04R19/04 ,  H04R2499/11 ,  H01L2924/00014 ,  H01L2924/00012

Abstract: A semiconductor device includes a microphone module implemented on a first semiconductor die and a signal processing module implemented on a second semiconductor die. The microphone module includes a movable microphone element arranged at a main side of the first semiconductor die and the second semiconductor die is mounted to the main side of the first semiconductor die.

Abstract translation: 半导体器件包括实现在第一半导体管芯上的麦克风模块和在第二半导体管芯上实现的信号处理模块。 麦克风模块包括布置在第一半导体管芯的主侧的可移动的麦克风元件，并且第二半导体管芯安装到第一半导体管芯的主侧。

公开(公告)号：US11521907B2

公开(公告)日：2022-12-06

申请号：US17070559

申请日：2020-10-14

Applicant: Infineon Technologies AG

Inventor： Stefan Woetzel ,  Chee Yang Ng

IPC: H01L23/31 ,  H01L23/538

Abstract: A semiconductor package includes a substrate formed of electrically insulating material and having a die mounting surface, a first semiconductor die embedded within the substrate and comprising a first conductive terminal that faces the die mounting surface, a second semiconductor die mounted on the die mounting surface and comprising a first conductive terminal that faces and is spaced apart from the die mounting surface, and a first electrical connection that directly connects the first conductive terminals of the first and second semiconductor dies together, wherein the second semiconductor die partially overlaps with the first semiconductor die.

公开(公告)号：US20220139798A1

公开(公告)日：2022-05-05

申请号：US17519805

申请日：2021-11-05

Applicant: Infineon Technologies AG

Inventor： Chee Yang Ng

IPC: H01L23/373 ,  H01L23/31 ,  H01L23/433 ,  H01L23/367 ,  H01L21/56

Abstract: A method of forming a chip package is provided. The method may include: arranging an elastic thermal interface material over a semiconductor chip, wherein the elastic thermal interface material may be configured to transfer heat from the chip to an outside; arranging a mold around the thermal interface material and at least partially around the semiconductor chip, thereby compressing the elastic thermal interface material with the mold; and filling the mold with a packaging material.

公开(公告)号：US20220115287A1

公开(公告)日：2022-04-14

申请号：US17070559

申请日：2020-10-14

Applicant: Infineon Technologies AG

Inventor： Stefan Woetzel ,  Chee Yang Ng

IPC: H01L23/31 ,  H01L23/538

Abstract: A semiconductor package includes a substrate formed of electrically insulating material and having a die mounting surface, a first semiconductor die embedded within the substrate and comprising a first conductive terminal that faces the die mounting surface, a second semiconductor die mounted on the die mounting surface and comprising a first conductive terminal that faces and is spaced apart from the die mounting surface, and a first electrical connection that directly connects the first conductive terminals of the first and second semiconductor dies together, wherein the second semiconductor die partially overlaps with the first semiconductor die.

公开(公告)号：US20220102235A1

公开(公告)日：2022-03-31

申请号：US17034109

申请日：2020-09-28

Applicant: Infineon Technologies AG

Inventor： Stefan Woetzel ,  Chee Yang Ng

IPC: H01L23/367 ,  H01L23/29 ,  H01L23/31 ,  H01L23/495 ,  H01L23/498 ,  H01L23/00 ,  H01L21/48 ,  H01L21/56 ,  H01L21/78

Abstract: A semiconductor package includes: a carrier having a first side and a second side opposite the first side, the first side having a plurality of contact structures; a semiconductor die having a first side and a second side opposite the first side, the first side of the semiconductor die having a plurality of pads attached to the plurality of contact structures at the first side of the carrier; a metal plate attached to the second side of the semiconductor die, the metal plate having a size that is independent of the size of the carrier and based on an expected thermal load to be presented by the semiconductor die; and an encapsulant confined by the carrier and the metal plate and laterally surrounding an edge of the semiconductor die. Corresponding methods of production are also provided.

公开(公告)号：US20200258842A1

公开(公告)日：2020-08-13

申请号：US16274991

申请日：2019-02-13

Applicant: Infineon Technologies AG

Inventor： Chee Yang Ng ,  Hock Siang Chua ,  Stefan Macheiner ,  Josef Maerz ,  Nurfarena Othman ,  Joseph Victor Soosai Prakasam ,  Hong Hock Tay

IPC: H01L23/538 ,  H01L23/13 ,  H01L23/00 ,  H01L25/16 ,  H01L23/498 ,  H01L23/373 ,  H01L23/31 ,  H01L21/48 ,  H01L23/367

Abstract: A semiconductor package includes a frame having an insulative body with a first main surface and a second main surface opposite the first main surface, a first plurality of metal traces at the first main surface, and a first cavity in the insulative body. A thermally and/or electrically conductive material filling the first cavity in the insulative body and having a different composition than the first plurality of metal traces. The thermally and/or electrically conductive material provides a thermally and/or electrically conductive path between the first and the second main surfaces of the insulative body. A semiconductor die attached to the frame at the first main surface of the insulative body is electrically connected to the first plurality of metal traces and to the thermally and/or electrically conductive material filling the first cavity in the insulative body. A corresponding method of manufacture is also described.

公开(公告)号：US20200048075A1

公开(公告)日：2020-02-13

申请号：US16659936

申请日：2019-10-22

Applicant: Infineon Technologies AG

Inventor： Sook Woon Chan ,  Chau Fatt Chiang ,  Kok Yau Chua ,  Swee Kah Lee ,  Chee Yang Ng

IPC: B81B7/00 ,  H01L29/84 ,  G01L19/00 ,  B81C1/00 ,  B81B7/02 ,  H04R19/00 ,  H04R19/04 ,  H04R31/00

Abstract: An embodiment device includes a body structure having an interior cavity, a control chip disposed on a first interior surface of the interior cavity, and a sensor attached, at a first side, to a second interior surface of the interior cavity opposite the first interior surface. The sensor has a mounting pad on a second side of the sensor that faces the first interior surface, and the sensor is vertically spaced apart from the control chip by an air gap, with the sensor is aligned at least partially over the control chip. The device further includes an interconnect having a first end mounted on the mounting pad, the interconnect extending through the interior cavity toward the first interior surface, and the control chip is in electrical communication with the sensor by way of the interconnect.