公开(公告)号：US20190042335A1

公开(公告)日：2019-02-07

申请号：US15941509

申请日：2018-03-30

Applicant: Intel Corporation

Inventor： Mario Flajslik ,  Keith D. Underwood ,  Timo Schneider ,  James Dinan

IPC: G06F9/54

Abstract: Technologies for generating triggered conditional events operations include a host fabric interface (HFI) of a compute device configured to receive an operation execution command message associated with a triggered operation that has been fired, process the received operation execution command message to extract and store argument information from the received operation execution command, and increment an event counter associated with the fired triggered operation. The HFI is further configured to perform a triggered compare-and-generate event (TCAGE) operation as a function of the extracted argument information, determine whether to generate a triggering event, generate the triggering event as a function of the performed TCAGE operation, insert the generated triggered event into a triggered operation queue, and update the value of the event counter. Other embodiments are described herein.

公开(公告)号：US10128984B2

公开(公告)日：2018-11-13

申请号：US14977561

申请日：2015-12-21

Applicant: INTEL CORPORATION

Inventor： Keith D. Underwood ,  Charles A. Giefer

IPC: H04L1/16 ,  H04L12/935

Abstract: Packet tracking techniques for communication networks are described. In an example embodiment, an apparatus may comprise circuitry, a tracking component for execution by the circuitry to, in response to a request of an initiator device to establish a packet transfer session, determine whether tracking information for the packet transfer session can be locally maintained and in response to a determination that the tracking information for the packet transfer session cannot be locally maintained, identify one or more tracking parameters for retention at the initiator device, and a communication component for execution by the circuitry to send an acceptance message to grant the request of the initiator device to establish the packet transfer session, the acceptance message to indicate a request for retention of the one or more tracking parameters. Other embodiments are described and claimed.

公开(公告)号：US20180287904A1

公开(公告)日：2018-10-04

申请号：US15474833

申请日：2017-03-30

Applicant: Intel Corporation

Inventor： Karl P. Brummel ,  Charles A. Giefer ,  Nathan S. Miller ,  Keith D. Underwood

IPC: H04L12/26 ,  H04L29/08

Abstract: A computing device, a method, and a system to enforce concurrency limits within a network fabric. The computing device includes a memory device; and a network interface controller coupled to the memory device. The network interface controller includes circuitry to communicate with a plurality of target computing devices in a network fabric. The circuitry is configured to generate packets for transmission to respective ones of a plurality of target nodes. For each packet addressed to its corresponding target node, the circuitry is to determine whether transmitting the packet would violate the target node's concurrency limit. If transmitting the packet would not violate the target node's concurrency limit, the circuitry is to transmit the packet to the target node. However, if transmitting the packet would violate the target node's concurrency limit, the circuitry would store the packet in a retransmit buffer of the computing device, where the retransmit buffer is to further store already transmitted packets flagged for retransmission. The circuitry would then transmit the packet from the retransmit buffer when transmitting the packet from the retransmit buffer would not violate the target node's concurrency limit.

公开(公告)号：US20170093770A1

公开(公告)日：2017-03-30

申请号：US14866541

申请日：2015-09-25

Applicant: Intel Corporation

Inventor： Mario Flajslik ,  James Dinan ,  Keith D. Underwood

IPC: H04L12/58

CPC classification number: H04L51/12

Abstract: Technologies for filtering a received message include a receiving computing device to receive messages and a sender computing device to send messages. The receiving computing device is configured to retrieve a descriptor from a received message and retrieve another descriptor from an inspection entry of a network port entry selected from a network port entry table by the receiving computing device based on the logical network port that received the message. The receiving computing device is further configured to compare the descriptors to determine whether the descriptors match. Upon finding a match, the receiving computing device is still further configured to perform an operation corresponding to the inspection entries whose descriptor matches the descriptor of the message. Other embodiments are described and claimed.

公开(公告)号：US11157336B2

公开(公告)日：2021-10-26

申请号：US15859389

申请日：2017-12-30

Applicant: Intel Corporation

Inventor： James Dinan ,  Mario Flajslik ,  Timo Schneider ,  Keith D. Underwood

IPC: G06F9/54 ,  G06F9/30

Abstract: Technologies for extending triggered operations include a host fabric interface (HFI) of a compute device configured to detect a triggering event associated with a counter, increment the counter, and determine whether a value of the counter matches a trigger threshold of a triggered operation in a triggered operation queue associated with the counter. The HFI is further configured to execute, one or more commands associated with the triggered operation upon determining that the value of the counter matches the trigger threshold, and determine, subsequent to the execution of the one or more commands, whether the triggered operation corresponds to a recurring triggered operation. The HFI is additionally configured to increment, in response to a determination that the triggered operation corresponds to a recurring triggered operation, the value of the trigger threshold by a threshold increment and re-insert the triggered operation into the triggered operation queue. Other embodiments are described herein.

公开(公告)号：US10574733B2

公开(公告)日：2020-02-25

申请号：US14858051

申请日：2015-09-18

Applicant: Intel Corporation

Inventor： James Dinan ,  Mario Flajslik ,  Keith D. Underwood

IPC: H04L29/08 ,  H04L12/863 ,  H04L12/743

Abstract: Technologies for handling message passing interface receive operations include a compute node to determine a plurality of parameters of a receive entry to be posted and determine whether the plurality of parameters includes a wildcard entry. The compute node generates a hash based on at least one parameter of the plurality of parameters in response to determining that the plurality of parameters does not include the wildcard entry and appends the receive entry to a list in a bin of a posted receive data structure, wherein the bin is determined based on the generated hash. The compute node further tracks the wildcard entry in the posted receive data structure in response to determining the plurality of parameters includes the wildcard entry and appends the receive entry to a wildcard list of the posted receive data structure in response to tracking the wildcard entry.

公开(公告)号：US10348634B2

公开(公告)日：2019-07-09

申请号：US14979131

申请日：2015-12-22

Applicant: Intel Corporation

Inventor： Keith D. Underwood ,  Charles A Giefer ,  Bruce M. Pirie ,  Karl P. Brummel

IPC: H04L12/801 ,  H04L12/807 ,  H04L29/12

Abstract: Technologies for tracking out-of-order network packets include a target computing node coupled to a source computing node via a communication channel. The target computing node is configured to allocate a small window in memory in which to store a bit mask corresponding to a number of out-of-order network packets received from the source computing node via the communication channel. The target computing node is further configured to update the bit mask in the small window upon receiving an out-of-order network packet from the source computing node. The target computing node is additionally configured to allocate a large window in memory in response to a determination the size of the bit mask is larger than the size of the small window, store the bit mask in the large window, and store a pointer to the large window in the small window. Other embodiments are described and claimed.

公开(公告)号：US20170180265A1

公开(公告)日：2017-06-22

申请号：US14979131

申请日：2015-12-22

Applicant: Intel Corporation

Inventor： Keith D. Underwood ,  Charles A. Giefer ,  Bruce M. Pirie ,  Karl P. Brummel

IPC: H04L12/801 ,  H04L12/807 ,  H04L29/12

CPC classification number: H04L47/34 ,  H04L47/27 ,  H04L61/6095

Abstract: Technologies for tracking out-of-order network packets include a target computing node coupled to a source computing node via a communication channel. The target computing node is configured to allocate a small window in memory in which to store a bit mask corresponding to a number of out-of-order network packets received from the source computing node via the communication channel. The target computing node is further configured to update the bit mask in the small window upon receiving an out-of-order network packet from the source computing node. The target computing node is additionally configured to allocate a large window in memory in response to a determination the size of the bit mask is larger than the size of the small window, store the bit mask in the large window, and store a pointer to the large window in the small window. Other embodiments are described and claimed.