公开(公告)号：US20230363167A1

公开(公告)日：2023-11-09

申请号：US18348418

申请日：2023-07-07

Applicant: Kioxia Corporation

Inventor： Yoshiaki FUKUZUMI ,  Shinya ARAI ,  Masaki TSUJI ,  Hideaki AOCHI ,  Hiroyasu TANAKA

IPC: H10B43/27 ,  H01L29/66 ,  H01L29/792 ,  H10B43/10 ,  H10B43/50 ,  H01L29/423

CPC classification number: H10B43/27 ,  H01L29/66833 ,  H01L29/7926 ,  H10B43/10 ,  H10B43/50 ,  H01L29/42344

Abstract: A semiconductor memory device includes a connecting member including a semiconductor material, a first electrode film, a first insulating film, a stacked body and three or more semiconductor pillars. The stacked body includes second electrode films and second insulating films that alternately stacked. The semiconductor pillars are arrayed along two or more directions, extend in a stacking direction, pierce through the stacked body and the first insulating film, and are connected to the connecting member. The device includes a third insulating film provided between the semiconductor pillars and the stacked body and between the connecting member and the first electrode film. A charge storage layer is provided at least between one of the second electrode films and the third insulating film.

公开(公告)号：US20230307396A1

公开(公告)日：2023-09-28

申请号：US17901448

申请日：2022-09-01

Applicant: Kioxia Corporation

Inventor： Yasunori IWASHITA ,  Shinya ARAI ,  Keisuke NAKATSUKA ,  Hiroaki ASHIDATE

IPC: H01L23/00 ,  H01L25/065 ,  H01L25/18 ,  H01L25/00

CPC classification number: H01L24/08 ,  H01L25/0657 ,  H01L25/18 ,  H01L24/06 ,  H01L24/80 ,  H01L25/50 ,  H01L2224/06517 ,  H01L2224/08145 ,  H01L2224/80895 ,  H01L2224/80896 ,  H01L2924/1431 ,  H01L2924/14511 ,  H01L2924/3511

Abstract: A semiconductor device includes a first stacked body and a second stacked body bonded to the first stacked body. The first stacked body includes a first pad provided on a first bonding surface to which the first stacked body and the second stacked body are bonded. The second stacked body includes a second pad bonded to the first pad on the first bonding surface. When a direction from the first stacked body to the second stacked body is defined as a first direction, a direction intersecting with the first direction is defined as a second direction, a direction intersecting with the first direction and the second direction is defined as a third direction, dimensions of the first pad and the second pad in the third direction are defined as PX1 and PX2, respectively, and dimensions of the first pad and the second pad in the second direction are defined as PY1 and PY2, respectively, the dimensions of the first pad and the second pad satisfy at least one of Equations (1) and (2) below.


PX1>PY1   (1)



PY2>PX2   (2)

公开(公告)号：US20220085003A1

公开(公告)日：2022-03-17

申请号：US17189955

申请日：2021-03-02

Applicant: Kioxia Corporation

Inventor： Yasunori IWASHITA ,  Shinya ARAI ,  Keisuke NAKATSUKA ,  Takahiro TOMIMATSU ,  Ryo TANAKA

IPC: H01L25/18 ,  H01L23/00

Abstract: According to one embodiment, a semiconductor device includes a first chip, and a second chip bonded to the first chip. The first chip includes: a substrate; a transistor provided on the substrate; a plurality of first wirings provided above the transistor; and a plurality of first pads provided above the first wirings. The second chip includes: a plurality of second pads coupled to the plurality of first pads, respectively; a plurality of second wirings provided above the second pads; and a memory cell array provided above the second wirings. The first wiring, the first pad, the second pad, and the second wiring are coupled to one another in series to form a first pattern.

公开(公告)号：US20220084970A1

公开(公告)日：2022-03-17

申请号：US17190006

申请日：2021-03-02

Applicant: Kioxia Corporation

Inventor： Takahiro TOMIMATSU ,  Shinya ARAI

IPC: H01L23/00 ,  H01L25/065 ,  H01L25/18 ,  H01L23/535 ,  H01L25/00

Abstract: According to one embodiment, a semiconductor device includes a first substrate; a first insulating film provided on the first substrate; a first plug provided in the first insulating film; a second substrate provided on the first insulating film; and a first wiring including a first portion and a second portion. The first portion is provided in the second substrate and coupled to the first plug, and the second portion is provided on the second substrate and coupled to a bonding pad.