公开(公告)号：US07667301B2

公开(公告)日：2010-02-23

申请号：US10528069

申请日：2003-09-26

申请人： Naoto Nakamura ,  Iwao Nakamura ,  Tomoharu Shimada ,  Kenichi Ishiguro ,  Sadao Nakashima

发明人： Naoto Nakamura ,  Iwao Nakamura ,  Tomoharu Shimada ,  Kenichi Ishiguro ,  Sadao Nakashima

IPC分类号： H01L23/58

CPC分类号： H01L21/67306 ,  H01L21/67098 ,  H01L21/67309

摘要： A thermal treatment apparatus, a method for manufacturing a semiconductor device, and a method for manufacturing a substrate, wherein the occurrence of slip dislocation in a substrate during heat treatment is reduced, and a high-quality semiconductor device can be manufactured, are intended to be provided.A substrate support 30 is formed from a main body portion 56 and a supporting portion 58. In the main body portion 56, a plurality of placing portions 66 extend parallel, and supporting portions 58 are provided on the placing portions 66. A substrate 68 is placed on the supporting portion 58. The supporting portion 58 has a smaller area than an area of a flat face of the substrate, and is formed from a silicon plate having a thickness larger than thickness of the substrate, so that deformation during heat treatment is reduced. The supporting portion 58 is made of silicon, and a layer coated with silicon carbide (SiC) is formed on a substrate-placing face of the supporting portion 58.

摘要翻译： 热处理装置，半导体装置的制造方法以及基板的制造方法，其中，热处理时的基板中的滑动位错的发生减少，制造高品质的半导体装置， 提供。 基板支撑体30由主体部分56和支撑部分58形成。在主体部分56中，多个放置部分66平行延伸，支撑部分58设置在放置部分66上。基板68是 放置在支撑部58上。支撑部58具有比基板的平坦面的面积小的面积，并且由厚度大于基板的厚度的硅板形成，使得热处理时的变形为 减少 支撑部分58由硅制成，并且在支撑部分58的基片放置面上形成涂有碳化硅（SiC）的层。

公开(公告)号：US20090186489A1

公开(公告)日：2009-07-23

申请号：US12382400

申请日：2009-03-16

申请人： Naoto Nakamura ,  Iwao Nakamura ,  Tomoharu Shimada ,  Kenichi Ishiguro ,  Sadao Nakashima

发明人： Naoto Nakamura ,  Iwao Nakamura ,  Tomoharu Shimada ,  Kenichi Ishiguro ,  Sadao Nakashima

IPC分类号： H01L21/30

CPC分类号： H01L21/67306 ,  H01L21/67098 ,  H01L21/67309

摘要： A thermal treatment apparatus, a method for manufacturing a semiconductor device, and a method for manufacturing a substrate, wherein the occurrence of slip dislocation in a substrate during heat treatment is reduced, and a high-quality semiconductor device can be manufactured, are intended to be provided.A substrate support 30 is formed from a main body portion 56 and a supporting portion 58. In the main body portion 56, a plurality of placing portions 66 extend parallel, and supporting portions 58 are provided on the placing portions 66. A substrate 68 is placed on the supporting portion 58. The supporting portion 58 has a smaller area than an area of a flat face of the substrate, and is formed from a silicon plate having a thickness larger than thickness of the substrate, so that deformation during heat treatment is reduced. The supporting portion 58 is made of silicon, and a layer coated with silicon carbide (SiC) is formed on a substrate-placing face of the supporting portion 58.

摘要翻译： 热处理装置，半导体装置的制造方法以及基板的制造方法，其中，热处理时的基板中的滑动位错的发生减少，制造高品质的半导体装置， 提供。 基板支撑体30由主体部分56和支撑部分58形成。在主体部分56中，多个放置部分66平行延伸，支撑部分58设置在放置部分66上。基板68是 放置在支撑部58上。支撑部58具有比基板的平坦面的面积小的面积，并且由厚度大于基板的厚度的硅板形成，使得热处理时的变形为 减少 支撑部分58由硅制成，并且在支撑部分58的基片放置面上形成涂有碳化硅（SiC）的层。

公开(公告)号：US20090016854A1

公开(公告)日：2009-01-15

申请号：US11887004

申请日：2006-03-27

申请人： Akira Morohashi ,  Iwao Nakamura ,  Ryota Sasajima ,  Keishin Yamazaki ,  Sadao Nakashima

发明人： Akira Morohashi ,  Iwao Nakamura ,  Ryota Sasajima ,  Keishin Yamazaki ,  Sadao Nakashima

IPC分类号： B66C17/08

CPC分类号： H01L21/67017 ,  H01L21/67109

摘要： A heat-treating apparatus capable of realizing a highly precise processing maintaining a high degree of safety, and a method of producing substrates are provided. The heat-treating apparatus comprises a reaction tube for treating substrates; a manifold for supporting the reaction tube; and a heater provided surrounding the reaction tube to heat the interior of reaction tube; wherein the reaction tube and the manifold are in contact with each other as their continuous flat surfaces come in contact with each other; a cover member is provided to cover the contact portion between the reaction tube and the manifold from the outer side; and the cover member is provided with at least either a gas feed port or an exhaust port communicated with a space formed among the cover member, the reaction tube and the manifold.

摘要翻译： 提供一种能够实现保持高度安全性的高精度加工的热处理装置及其制造方法。 热处理装置包括用于处理基板的反应管; 用于支撑反应管的歧管; 和设置在反应管周围的加热器以加热反应管内部的加热器; 其中所述反应管和所述歧管在它们的连续平坦表面彼此接触时彼此接触; 盖构件被设置成从外侧覆盖反应管和歧管之间的接触部分; 并且盖构件设置有至少一个与形成在盖构件，反应管和歧管之间的空间连通的气体供给口或排气口。

公开(公告)号：US20070194411A1

公开(公告)日：2007-08-23

申请号：US10528069

申请日：2003-09-26

申请人： Naoto Nakamura ,  Iwao Nakamura ,  Tomoharu Shimada ,  Kenichi Ishiguro ,  Sadao Nakashima

发明人： Naoto Nakamura ,  Iwao Nakamura ,  Tomoharu Shimada ,  Kenichi Ishiguro ,  Sadao Nakashima

IPC分类号： H01L23/58

CPC分类号： H01L21/67306 ,  H01L21/67098 ,  H01L21/67309

摘要： A thermal treatment apparatus, a method for manufacturing a semiconductor device, and a method for manufacturing a substrate, wherein the occurrence of slip dislocation in a substrate during heat treatment is reduced, and a high-quality semiconductor device can be manufactured, are intended to be provided. A substrate support 30 is formed from a main body portion 56 and a supporting portion 58. In the main body portion 56, a plurality of placing portions 66 extend parallel, and supporting portions 58 are provided on the placing portions 66. A substrate 68 is placed on the supporting portion 58. The supporting portion 58 has a smaller area than an area of a flat face of the substrate, and is formed from a silicon plate having a thickness larger than thickness of the substrate, so that deformation during heat treatment is reduced. The supporting portion 58 is made of silicon, and a layer coated with silicon carbide (SiC) is formed on a substrate-placing face of the supporting portion 58.

摘要翻译： 热处理装置，半导体装置的制造方法以及基板的制造方法，其中，热处理时的基板中的滑动位错的发生减少，制造高品质的半导体装置， 提供。 基板支撑体30由主体部分56和支撑部分58形成。在主体部分56中，多个放置部分66平行延伸，支撑部分58设置在放置部分66上。基板68是 放置在支撑部58上。支撑部58具有比基板的平坦面的面积小的面积，并且由厚度大于基板的厚度的硅板形成，使得热处理时的变形为 减少 支撑部分58由硅制成，并且在支撑部分58的基片放置面上形成涂有碳化硅（SiC）的层。

公开(公告)号：US5989981A

公开(公告)日：1999-11-23

申请号：US886876

申请日：1997-07-02

申请人： Sadao Nakashima ,  Terukazu Ohno ,  Toshiaki Tsuchiya ,  Tetsushi Sakai ,  Shinji Nakamura ,  Takemi Ueki ,  Yuichi Kado ,  Tadao Takeda

发明人： Sadao Nakashima ,  Terukazu Ohno ,  Toshiaki Tsuchiya ,  Tetsushi Sakai ,  Shinji Nakamura ,  Takemi Ueki ,  Yuichi Kado ,  Tadao Takeda

IPC分类号： H01L21/265 ,  H01L21/322

CPC分类号： H01L21/3226 ,  H01L21/26533

摘要： A method of manufacturing an SOI substrate uses an SOI substrate having a first single-crystal silicon layer, an insulating layer formed on the first single-crystal silicon layer, and a second single-crystal silicon layer formed on the insulating layer. The surface of the second single-crystal silicon layer is thermally oxidized. The second single-crystal silicon layer is controlled to have a predetermined thickness by removing the thermally oxidized surface. This step controlling the second single-crystal silicon layer to have a predetermined thickness includes the step of eliminating, by annealing, a stacking fault formed by the thermal oxidation.

摘要翻译： 制造SOI衬底的方法使用具有第一单晶硅层，形成在第一单晶硅层上的绝缘层和形成在绝缘层上的第二单晶硅层的SOI衬底。 第二单晶硅层的表面被热氧化。 通过去除热氧化表面，将第二单晶硅层控制为具有预定的厚度。 控制第二单晶硅层具有预定厚度的步骤包括通过退火消除由热氧化形成的堆垛层错的步骤。

公开(公告)号：US5665613A

公开(公告)日：1997-09-09

申请号：US458507

申请日：1995-06-02

申请人： Sadao Nakashima ,  Katsutoshi Izumi ,  Norihiko Ohwada ,  Tatsuhiko Katayama

发明人： Sadao Nakashima ,  Katsutoshi Izumi ,  Norihiko Ohwada ,  Tatsuhiko Katayama

IPC分类号： H01L21/76 ,  H01L21/00 ,  H01L21/336 ,  H01L21/762 ,  H01L21/84 ,  H01L27/12 ,  H01L29/78 ,  H01L29/786

CPC分类号： H01L29/66772 ,  H01L21/76264 ,  H01L21/84 ,  H01L21/76267 ,  H01L21/76281 ,  Y10S438/981

摘要： A SIMOX substrate 1 is processed through high temperature oxidation treatment after forming a mask-pattern 3 to shield specified electrodes from oxidation in order to increase partly a thickness of a buffed oxide layer 2 to form an area 4. Next, after an oxide film is removed from the surface of the substrate and LOCOS separation is practiced, MOSFET is produced by fabricating a source S and a drain D on the area 4 or the buffed oxide layer 2. Since the buried oxide layer corresponding to electrodes parts influenced by disadvantages of parasitic capacitance are thickened, an operation speed of an inverter is not much decreased and since mean thickness of the buried oxide layer can be thinner, a decrease of a drain electric current by negative electrical resistance can be suppressed. Furthermore, since the thickness of the buffed oxide layer can be controlled in response to each device, plural devices having different breakdown voltages are formed together on the same substrate.

摘要翻译： 在形成掩模图案3之后，通过高温氧化处理来对SIMOX基板1进行处理，以屏蔽规定的电极免受氧化，以部分地增加抛光氧化物层2的厚度以形成区域4.接下来，在氧化膜为 从基板表面去除和LOCOS分离，通过在区域4或抛光氧化物层2上制造源极S和漏极D而产生MOSFET。由于对应于电极部分的掩埋氧化物层受寄生的缺点影响 电容变厚，逆变器的运转速度不会降低，并且由于埋入氧化物层的平均厚度能够变薄，所以可以抑制由负电阻引起的漏极电流的降低。 此外，由于可以响应于每个器件来控制抛光氧化物层的厚度，所以在同一衬底上一起形成具有不同击穿电压的多个器件。