Method for receiver delay detection and latency minimization for a source synchronous wave pipelined interface
    21.
    发明授权
    Method for receiver delay detection and latency minimization for a source synchronous wave pipelined interface 失效
    用于源同步波流水线接口的接收机延迟检测和延迟最小化的方法

    公开(公告)号:US06954870B2

    公开(公告)日:2005-10-11

    申请号:US10096382

    申请日:2002-03-12

    CPC分类号: H04L7/10 H04L7/0008 H04L7/005

    摘要: A method of calibrating an elastic interface is provided to automatically achieve a minimal cycle delay through the interface. An existing self-alignment interface (i.e. elastic interface) is used to de-skew within a cycle and stage the data to have it arrive on a given, programmed target cycle. However, this target cycle must be calculated in advance and may be larger than it needs to be, causing more latency on the interface. This method is used to determine the earliest target cycle (with or without additional guard-band). This target cycle is used to adjust the interface automatically to achieve this earliest target cycle. The determination of earliest target cycle can be done once, continuously, or using a sample window. The method also can be used for interfaces that have frequency multipliers or phase shifts at its boundaries.

    摘要翻译: 提供校准弹性界面的方法以通过界面自动实现最小的循环延迟。 现有的自对准接口(即弹性接口)用于在一个周期内去偏移,并且在给定的编程的目标周期上对数据进行分段以使其达到。 但是,这个目标周期必须提前计算,并且可能会大于需要的时间,从而在接口上造成更多的延迟。 该方法用于确定最早的目标周期(带或不带附加保护带)。 该目标周期用于自动调整接口以实现最早的目标周期。 最早的目标周期的确定可以进行一次,连续或使用样本窗口。 该方法还可用于在其边界具有频率乘法器或相移的接口。

    Apparatus and method for recalibrating a source-synchronous pipelined self-timed bus interface
    22.
    发明授权
    Apparatus and method for recalibrating a source-synchronous pipelined self-timed bus interface 有权
    用于重新校准源同步流水线自定时总线接口的装置和方法

    公开(公告)号:US06922789B2

    公开(公告)日:2005-07-26

    申请号:US09960023

    申请日:2001-09-21

    CPC分类号: H04L7/10 G06F11/00 H04L7/0008

    摘要: An SMP computer system has an apparatus and method for recalibrating a self-timed, source-synchronous, pipelined interface while the computer system is running. The apparatus allows for quiescing the interface (ie. idling the processors to allow for no data transfers), raising fences (blocking interfaces), allowing for a quick clock centering recalibration step, and then unfencing and unquiescing to allow for the use of the interface again. The recalibration allows for compensating for drift over time on the interface to compensate for temperature, voltage, cycle time, and end-of-life degradation without bringing down and restarting the system.

    摘要翻译: SMP计算机系统具有在计算机系统运行时重新校准自定时,源同步,流水线接口的装置和方法。 该设备允许停顿接口(即空闲处理器以允许不进行数据传输),提高栅栏(阻塞接口),允许快速的时钟定心重新校准步骤,然后解码和解码以允许使用接口 再次。 重新校准可以补偿接口上随时间的漂移,以补偿温度,电压,循环时间和使用寿命结束后的降低,而不会导致系统重新启动和重新启动。