公开(公告)号：US20190228814A1

公开(公告)日：2019-07-25

申请号：US15875985

申请日：2018-01-19

Applicant: Micron Technology, Inc.

Inventor： Masaru Morohashi

IPC: G11C11/406 ,  G11C11/408

CPC classification number: G11C11/40615 ,  G11C11/4074 ,  G11C11/4076 ,  G11C11/4087

Abstract: Apparatuses and methods for refreshing memory of a semiconductor device are described. An example method includes producing, responsive to a first refresh command, a plurality of first refresh addresses and detecting, responsive to the plurality of first refresh addresses, that the plurality of first refresh addresses include, a first defective address and a first non-defective address. The example method further includes refreshing, responsive to a second refresh command following the first refresh command, the non-defective first address without refreshing the first defective address.

公开(公告)号：US20190088296A1

公开(公告)日：2019-03-21

申请号：US16192639

申请日：2018-11-15

Applicant: MICRON TECHNOLOGY, INC.

Inventor： Masaru Morohashi

IPC: G11C7/10 ,  G11C8/12 ,  G11C7/24 ,  G11C7/20

CPC classification number: G11C7/1087 ,  G11C7/1084 ,  G11C7/20 ,  G11C7/24 ,  G11C8/12

Abstract: Apparatuses, methods, memory packages, and semiconductor chips are disclosed. An example apparatus includes a semiconductor chip including a layer identification setting path circuit configured to receive respective input signals from a plurality of input layer identification setting paths. The layer identification setting path circuit is further configured to change a value of at least one of the respective input signals to generate respective output signals and to provide the respective output signals to a plurality of output layer identification setting paths. The apparatus further includes an identification circuit configured to determine identification information based on the respective input signals and to compare the identification information to received access layer identification information. The identification circuit is configured to process received command signals based on the comparison between the identification information and the access layer identification information.

公开(公告)号：US10014038B2

公开(公告)日：2018-07-03

申请号：US14746435

申请日：2015-06-22

Applicant: Micron Technology, Inc.

Inventor： Masaru Morohashi

IPC: G11C7/10 ,  G11C7/20 ,  G11C7/24 ,  G11C8/12

CPC classification number: G11C7/1087 ,  G11C7/1084 ,  G11C7/20 ,  G11C7/24 ,  G11C8/12

Abstract: Apparatuses, methods, memory packages, and semiconductor chips are disclosed. An example apparatus includes a semiconductor chip including a layer identification setting path circuit configured to receive respective input signals from a plurality of input layer identification setting paths. The layer identification setting path circuit is further configured to change a value of at least one of the respective input signals to generate respective output signals and to provide the respective output signals to a plurality of output layer identification setting paths. The apparatus further includes a identification circuit configured to determine identification information based on the respective input signals and to compare the identification information to received access layer identification information. The identification circuit is configured to process received command signals based on the comparison between the identification information and the access layer identification information.