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公开(公告)号:US20200327926A1
公开(公告)日:2020-10-15
申请号:US16379222
申请日:2019-04-09
Applicant: Micron Technology, Inc.
Inventor: Ferdinando Bedeschi , Stefan Frederik Schippers
IPC: G11C11/4096 , G11C11/4091 , G11C11/408 , H01L27/108
Abstract: Methods, systems, and devices for a memory device with multiplexed digit lines are described. In some cases, a memory cell of the memory device may include a storage component and a selection component that includes two transistors. A first transistor may be coupled with a word line and a second transistor may be coupled with a select line to selectively couple the memory cell with a digit line. The selection component, in conjunction with a digit line multiplexing component, may support a sense component common to a set of digit lines. In some cases, the digit line of the set may be coupled with the sense component during a read operation, while the remaining digit lines of the set are isolated from the sense component.
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公开(公告)号:US10755751B2
公开(公告)日:2020-08-25
申请号:US16426435
申请日:2019-05-30
Applicant: Micron Technology, Inc.
Inventor: Emanuele Confalonieri , Stefano Ratti , Gary G. Lazarowics , Stefan Frederik Schippers , Stefano Claudio Roseghini , Angelo Clemente Scardilla
Abstract: Apparatuses, methods, and devices that can be utilized to provide temperature-based memory operations are described. One or more apparatuses can include a memory device and a controller coupled to the memory device and configured to: determine an operating temperature of the apparatus, determine one of a plurality of designated open blocks of the memory device to write data based on the operating temperature of the apparatus and a size of the data, and write the data in the determined one of the plurality of designated blocks of the memory device.
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公开(公告)号:US20190244642A1
公开(公告)日:2019-08-08
申请号:US16389666
申请日:2019-04-19
Applicant: MICRON TECHNOLOGY, INC.
Inventor: Stefan Frederik Schippers
IPC: G11C7/08 , G11C14/00 , G11C11/4091 , G11C29/02
CPC classification number: G11C7/08 , G11C11/4091 , G11C14/0009 , G11C14/0027 , G11C14/0036 , G11C14/0081 , G11C29/026 , G11C29/028 , G11C2207/2254
Abstract: Apparatuses and methods for calibrating sense amplifiers in a semiconductor memory are disclosed. An example apparatus includes an amplifier circuit and a calibration circuit. The amplifier circuit is configured to be coupled to a supply voltage and a reference voltage, and when activated the amplifier circuit is configured to provide an output signal at an output that is complementary to an input signal provided to an input. When activated by a calibration signal, the calibration circuit is configured to provide a calibration voltage to the output of the amplifier circuit, wherein the calibration voltage is an equilibration voltage between the supply voltage and the reference voltage provided to the amplifier circuit.
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公开(公告)号:US20190035436A1
公开(公告)日:2019-01-31
申请号:US15662059
申请日:2017-07-27
Applicant: MICRON TECHNOLOGY, INC.
Inventor: Stefan Frederik Schippers
IPC: G11C7/08
Abstract: Apparatuses and methods for calibrating sense at in a semiconductor memory are disclosed. An example apparatus includes an amplifier circuit and a calibration circuit. The amplifier circuit is configured to be coupled to a supply voltage and a reference voltage, and when activated the amplifier circuit is configured to provide an output signal at an output that is complementary to an input signal provided to an input. When activated by a calibration signal, the calibration circuit is configured to provide a calibration voltage to the of the amplifier circuit, wherein the calibration voltage is in equilibration voltage between the supply voltage and the reference voltage provided to the amplifier circuit.
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