利索-全球专利检索

  1. 登录
  2. 注册

搜索结果

288 条记录 (耗时 0.035 秒)

    Semiconductor device and method for manufacturing the same
    21.
    发明授权
    Semiconductor device and method for manufacturing the same 有权
    半导体装置及其制造方法

    公开(公告)号：US08110865B2

    公开(公告)日：2012-02-07

    申请号：US12888140

    申请日：2010-09-22

    申请人： Masayuki Tanaka ,  Daisuke Nishida ,  Ryota Fujitsuka ,  Katsuyuki Sekine ,  Akihito Yamamoto ,  Katsuaki Natori ,  Yoshio Ozawa

    发明人： Masayuki Tanaka ,  Daisuke Nishida ,  Ryota Fujitsuka ,  Katsuyuki Sekine ,  Akihito Yamamoto ,  Katsuaki Natori ,  Yoshio Ozawa

    IPC分类号： H01L29/788

    CPC分类号： H01L29/42324 ,  H01L27/115 ,  H01L27/11521 ,  H01L29/7883

    摘要： A semiconductor device includes a semiconductor substrate, a first insulating film formed on the semiconductor substrate, a charge storage layer formed on the first insulating film, a second insulating film formed on the charge storage layer, and a control electrode formed on the second insulating film, the second insulating film including a lower silicon nitride film, a lower silicon oxide film formed on the lower silicon nitride film, an intermediate insulating film formed on the lower silicon oxide film and containing a metal element, the intermediate insulating film having a relative dielectric constant of greater than 7, an upper silicon oxide film formed on the intermediate insulating film, and an upper silicon nitride film formed on the upper silicon oxide film.

    摘要翻译： 半导体器件包括半导体衬底，形成在半导体衬底上的第一绝缘膜，形成在第一绝缘膜上的电荷存储层，形成在电荷存储层上的第二绝缘膜，以及形成在第二绝缘膜上的控制电极 ，所述第二绝缘膜包括下氮化硅膜，形成在所述下氮化硅膜上的下氧化硅膜，形成在所述下氧化硅膜上并含有金属元素的中间绝缘膜，所述中间绝缘膜具有相对电介质 大于7的常数，形成在中间绝缘膜上的上部氧化硅膜和形成在上部氧化硅膜上的上部氮化硅膜。

    Semiconductor device
    23.
    发明申请
    Semiconductor device 失效
    半导体器件

    公开(公告)号：US20070241388A1

    公开(公告)日：2007-10-18

    申请号：US11783933

    申请日：2007-04-13

    申请人： Akihito Yamamoto ,  Masayuki Tanaka ,  Katsuyuki Sekine ,  Daisuke Nishida ,  Ryota Fujitsuka ,  Katsuaki Natori ,  Hirokazu Ishida ,  Yoshio Ozawa

    发明人： Akihito Yamamoto ,  Masayuki Tanaka ,  Katsuyuki Sekine ,  Daisuke Nishida ,  Ryota Fujitsuka ,  Katsuaki Natori ,  Hirokazu Ishida ,  Yoshio Ozawa

    IPC分类号： H01L29/76

    CPC分类号： H01L29/7883 ,  H01L27/115 ,  H01L27/11521 ,  H01L29/42336 ,  H01L29/513

    摘要： A semiconductor device includes semiconductor substrate, isolation insulating film, nonvolatile memory cells, each of the cells including tunnel insulating film, FG electrode, CG electrode, interelectrode insulating film between the CG and FG electrodes and including a first insulating film and a second insulating film on the first insulating film and having higher permittivity than the first insulating film, the interelectrode insulating film being provided on a side wall of the floating gate electrode in a cross-section view of a channel width direction of the cell, thickness of the interelectrode insulating film increasing from an upper portion of the side wall toward a lower portion of the side wall, thickness of the second insulating film on an upper corner of the FG electrode being thicker than thickness of the second insulating film on the other portions of the side wall in the cross-section view of the channel width direction.

    摘要翻译： 半导体器件包括半导体衬底，隔离绝缘膜，非易失性存储单元，每个单元包括隧道绝缘膜，FG电极，CG电极，CG和FG电极之间的电极间绝缘膜，并且包括第一绝缘膜和第二绝缘膜 在第一绝缘膜上并且具有比第一绝缘膜高的介电常数，电极间绝缘膜设置在浮栅电极的侧壁上，在电池的沟道宽度方向的横截面图中，绝缘电极的绝缘层的厚度 膜从侧壁的上部向侧壁的下部增加，FG电极的上角上的第二绝缘膜的厚度比侧壁的其他部分上的第二绝缘膜的厚度厚 在通道宽度方向的横截面视图中。

    Semiconductor device
    24.
    发明授权
    Semiconductor device 失效
    半导体器件

    公开(公告)号：US07612404B2

    公开(公告)日：2009-11-03

    申请号：US11783933

    申请日：2007-04-13

    申请人： Akihito Yamamoto ,  Masayuki Tanaka ,  Katsuyuki Sekine ,  Daisuke Nishida ,  Ryota Fujisuka ,  Katsuaki Natori ,  Hirokazu Ishida ,  Yoshio Ozawa

    发明人： Akihito Yamamoto ,  Masayuki Tanaka ,  Katsuyuki Sekine ,  Daisuke Nishida ,  Ryota Fujisuka ,  Katsuaki Natori ,  Hirokazu Ishida ,  Yoshio Ozawa

    IPC分类号： H01L29/788

    CPC分类号： H01L29/7883 ,  H01L27/115 ,  H01L27/11521 ,  H01L29/42336 ,  H01L29/513

    摘要： A semiconductor device includes semiconductor substrate, isolation insulating film, nonvolatile memory cells, each of the cells including tunnel insulating film, FG electrode, CG electrode, interelectrode insulating film between the CG and FG electrodes and including a first insulating film and a second insulating film on the first insulating film and having higher permittivity than the first insulating film, the interelectrode insulating film being provided on a side wall of the floating gate electrode in a cross-section view of a channel width direction of the cell, thickness of the interelectrode insulating film increasing from an upper portion of the side wall toward a lower portion of the side wall, thickness of the second insulating film on an upper corner of the FG electrode being thicker than thickness of the second insulating film on the other portions of the side wall in the cross-section view of the channel width direction.

    摘要翻译： 半导体器件包括半导体衬底，隔离绝缘膜，非易失性存储单元，每个单元包括隧道绝缘膜，FG电极，CG电极，CG和FG电极之间的电极间绝缘膜，并且包括第一绝缘膜和第二绝缘膜 在第一绝缘膜上并且具有比第一绝缘膜高的介电常数，电极间绝缘膜设置在浮栅电极的侧壁上，在电池的沟道宽度方向的横截面图中，绝缘电极的绝缘层的厚度 膜从侧壁的上部向侧壁的下部增加，FG电极的上角上的第二绝缘膜的厚度比侧壁的其他部分上的第二绝缘膜的厚度厚 在通道宽度方向的横截面视图中。

    Nonvolatile semiconductor memory device and data writing method therefor
    25.
    发明申请
    Nonvolatile semiconductor memory device and data writing method therefor 审中-公开
    非易失性半导体存储器件及其数据写入方法

    公开(公告)号：US20070183208A1

    公开(公告)日：2007-08-09

    申请号：US11653278

    申请日：2007-01-16

    申请人： Masayuki Tanaka ,  Ryota Fujitsuka ,  Katsuyuki Sekine ,  Yoshio Ozawa ,  Daisuke Nishida

    发明人： Masayuki Tanaka ,  Ryota Fujitsuka ,  Katsuyuki Sekine ,  Yoshio Ozawa ,  Daisuke Nishida

    IPC分类号： G11C11/34 ,  G11C16/04 ,  G11C16/06

    CPC分类号： G11C16/3418 ,  G11C16/0483 ,  G11C16/3427 ,  G11C16/3454

    摘要： A plurality of memory cell transistors each of which has a gate structure having a floating gate electrode formed of a first conductive film and stacked on an element region surrounded by an element isolation region on a silicon substrate with a first insulating film disposed therebetween and a control gate electrode formed of a second conductive film and stacked on the first conductive film with a second insulating film with a large dielectric constant disposed therebetween are arranged in a memory cell array. A detrap pulse supply circuit generates and supplies a detrap pulse signal to the control gate electrode of the memory cell transistor to extract charges from the second insulating film after data is written into each of the memory cell transistors.

    摘要翻译： 多个存储单元晶体管，每个存储单元晶体管具有栅极结构，该栅极结构具有由第一导电膜形成并浮置在由硅衬底上的元件隔离区域围绕的元件区域上的浮置栅电极，其间设置有第一绝缘膜， 在存储单元阵列中布置由第二导电膜形成的层叠在具有介电常数大的第二绝缘膜的第一导电膜上的栅电极。 去除脉冲电源电路产生并提供去除脉冲信号到存储单元晶体管的控制栅电极，以便在将数据写入每个存储单元晶体管之后从第二绝缘膜提取电荷。

    Semiconductor device and method of manufacturing the same
    26.
    发明授权
    Semiconductor device and method of manufacturing the same 失效
    半导体装置及其制造方法

    公开(公告)号：US07714373B2

    公开(公告)日：2010-05-11

    申请号：US11822437

    申请日：2007-07-05

    申请人： Katsuaki Natori ,  Masayuki Tanaka ,  Katsuyuki Sekine ,  Hirokazu Ishida ,  Masumi Matsuzaki ,  Yoshio Ozawa

    发明人： Katsuaki Natori ,  Masayuki Tanaka ,  Katsuyuki Sekine ,  Hirokazu Ishida ,  Masumi Matsuzaki ,  Yoshio Ozawa

    IPC分类号： H01L29/788

    CPC分类号： H01L27/115 ,  H01L27/11521

    摘要： There is disclosed a semiconductor device including a plurality of memory cell transistors, each memory cell transistor including a floating gate electrode isolated from each other via an isolation insulating film every memory cell transistor, an inter-electrode insulating film comprising a HfxAl1-xOy film (0.8≦x≦0.95) formed on the floating gate electrode, and a control gate electrode formed on the inter-electrode insulating film, wherein the memory cell transistors are arrayed to form a memory cell array.

    摘要翻译： 公开了一种包括多个存储单元晶体管的半导体器件，每个存储单元晶体管包括通过每个存储单元晶体管的隔离绝缘膜彼此隔离的浮栅，包括Hf x Al 1-x O y膜的电极间绝缘膜（ 形成在浮置栅电极上的栅极电极，以及形成在电极间绝缘膜上的控制栅电极，其中存储单元晶体管被排列以形成存储单元阵列。

    Semiconductor device and method of manufacturing the same
    29.
    发明申请
    Semiconductor device and method of manufacturing the same 失效
    半导体装置及其制造方法

    公开(公告)号：US20080017914A1

    公开(公告)日：2008-01-24

    申请号：US11822437

    申请日：2007-07-05

    申请人： Katsuaki Natori ,  Masayuki Tanaka ,  Katsuyuki Sekine ,  Hirokazu Ishida ,  Masumi Matsuzaki ,  Yoshio Ozawa

    发明人： Katsuaki Natori ,  Masayuki Tanaka ,  Katsuyuki Sekine ,  Hirokazu Ishida ,  Masumi Matsuzaki ,  Yoshio Ozawa

    IPC分类号： H01L29/788

    CPC分类号： H01L27/115 ,  H01L27/11521

    摘要： There is disclosed a semiconductor device including a plurality of memory cell transistors, each memory cell transistor including a floating gate electrode isolated from each other via an isolation insulating film every memory cell transistor, an inter-electrode insulating film comprising a HfxAl1-xOy film (0.8≦x≦0.95) formed on the floating gate electrode, and a control gate electrode formed on the inter-electrode insulating film, wherein the memory cell transistors are arrayed to form a memory cell array.

    摘要翻译： 公开了一种包括多个存储单元晶体管的半导体器件，每个存储单元晶体管包括通过每个存储单元晶体管的隔离绝缘膜彼此隔离的浮栅，包括Hf x 形成在浮置栅电极上的Al 1-x O O y O y膜（0.8 <= x <= 0.95），以及形成在栅极上的控制栅电极 - 电极绝缘膜，其中存储单元晶体管被排列以形成存储单元阵列。