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    SEMICONDUCTOR MEMORY DEVICE AND METHOD OF MANUFACTURING THE SAME
    3.
    发明申请
    SEMICONDUCTOR MEMORY DEVICE AND METHOD OF MANUFACTURING THE SAME 有权
    半导体存储器件及其制造方法

    公开(公告)号：US20070235799A1

    公开(公告)日：2007-10-11

    申请号：US11763070

    申请日：2007-06-14

    申请人： Masayuki Tanaka ,  Yoshio Ozawa ,  Hirokazu Ishida ,  Katsuaki Natori ,  Seiji Inumiya

    发明人： Masayuki Tanaka ,  Yoshio Ozawa ,  Hirokazu Ishida ,  Katsuaki Natori ,  Seiji Inumiya

    IPC分类号： H01L29/788

    CPC分类号： H01L29/7881 ,  G11C16/0483 ,  H01L21/28273 ,  H01L27/115 ,  H01L27/11521 ,  H01L29/42324 ,  H01L29/513

    摘要： A semiconductor memory device includes a semiconductor substrate, an isolation insulation film filled in a plurality of trenches formed in the semiconductor substrate to define a plurality of element formation regions, a floating gate of polysilicon provided on each of the element formation regions through a first insulation film, a second insulation film, provided on the floating gate, containing a metal element, a control gate of polysilicon, provided on the second insulation film, and source/drain regions provided in the semiconductor substrate, both a polysilicon conductive layer containing a metal element and a mutual diffusion layer composed of a silicate layer of a mixed oxide material composed of a silicon element contained in the floating gate and the control gate and a metal element contained in the second insulation film are provided on a surface of each of the floating gate and the control gate, respectively.

    摘要翻译： 半导体存储器件包括半导体衬底，隔离绝缘膜，填充在形成于半导体衬底中的多个沟槽中，以限定多个元件形成区域;多晶硅浮置栅极，通过第一绝缘层设置在每个元件形成区域上; 设置在浮置栅极上的第二绝缘膜，包含设置在第二绝缘膜上的金属元件，多晶硅控制栅极和设置在半导体衬底中的源极/漏极区域，包含金属的多晶硅导电层 元件和由浮置栅极中包含的硅元素和控制栅极组成的混合氧化物材料的硅酸盐层和包含在第二绝缘膜中的金属元素构成的互扩散层设置在每个浮动栅极的表面上 门和控制门。

    Semiconductor memory device and method of manufacturing the same
    4.
    发明授权
    Semiconductor memory device and method of manufacturing the same 有权
    半导体存储器件及其制造方法

    公开(公告)号：US07368780B2

    公开(公告)日：2008-05-06

    申请号：US11763070

    申请日：2007-06-14

    申请人： Masayuki Tanaka ,  Yoshio Ozawa ,  Hirokazu Ishida ,  Katsuaki Natori ,  Seiji Inumiya

    发明人： Masayuki Tanaka ,  Yoshio Ozawa ,  Hirokazu Ishida ,  Katsuaki Natori ,  Seiji Inumiya

    IPC分类号： H01L29/788

    CPC分类号： H01L29/7881 ,  G11C16/0483 ,  H01L21/28273 ,  H01L27/115 ,  H01L27/11521 ,  H01L29/42324 ,  H01L29/513

    摘要： A semiconductor memory device includes a semiconductor substrate, an isolation insulation film filled in a plurality of trenches formed in the semiconductor substrate to define a plurality of element formation regions, a floating gate of polysilicon provided on each of the element formation regions through a first insulation film, a second insulation film, provided on the floating gate, containing a metal element, a control gate of polysilicon, provided on the second insulation film, and source/drain regions provided in the semiconductor substrate, both a polysilicon conductive layer containing a metal element and a mutual diffusion layer composed of a silicate layer of a mixed oxide material composed of a silicon element contained in the floating gate and the control gate and a metal element contained in the second insulation film are provided on a surface of each of the floating gate and the control gate, respectively.

    摘要翻译： 半导体存储器件包括半导体衬底，隔离绝缘膜，填充在形成于半导体衬底中的多个沟槽中，以限定多个元件形成区域;多晶硅浮置栅极，通过第一绝缘层设置在每个元件形成区域上; 设置在浮置栅极上的第二绝缘膜，包含设置在第二绝缘膜上的金属元件，多晶硅控制栅极和设置在半导体衬底中的源极/漏极区域，包含金属的多晶硅导电层 元件和由浮置栅极中包含的硅元素和控制栅极组成的混合氧化物材料的硅酸盐层和包含在第二绝缘膜中的金属元素构成的互扩散层设置在每个浮动栅极的表面上 门和控制门。

    Semiconductor memory device and method of manufacturing the same
    6.
    发明授权
    Semiconductor memory device and method of manufacturing the same 有权
    半导体存储器件及其制造方法

    公开(公告)号：US08198159B2

    公开(公告)日：2012-06-12

    申请号：US12054089

    申请日：2008-03-24

    申请人： Masayuki Tanaka ,  Yoshio Ozawa ,  Hirokazu Ishida ,  Katsuaki Natori ,  Seiji Inumiya

    发明人： Masayuki Tanaka ,  Yoshio Ozawa ,  Hirokazu Ishida ,  Katsuaki Natori ,  Seiji Inumiya

    IPC分类号： H01L21/324 ,  H01L29/788

    CPC分类号： H01L29/7881 ,  G11C16/0483 ,  H01L21/28273 ,  H01L27/115 ,  H01L27/11521 ,  H01L29/42324 ,  H01L29/513

    摘要： A semiconductor memory device includes a semiconductor substrate, an isolation insulation film filled in a plurality of trenches formed in the semiconductor substrate to define a plurality of element formation regions, a floating gate of polysilicon provided on each of the element formation regions through a first insulation film, a second insulation film, provided on the floating gate, containing a metal element, a control gate of polysilicon, provided on the second insulation film, and source/drain regions provided in the semiconductor substrate, both a polysilicon conductive layer containing a metal element and a mutual diffusion layer composed of a silicate layer of a mixed oxide material composed of a silicon element contained in the floating gate and the control gate and a metal element contained in the second insulation film are provided on a surface of each of the floating gate and the control gate, respectively.

    摘要翻译： 半导体存储器件包括半导体衬底，隔离绝缘膜，填充在形成于半导体衬底中的多个沟槽中，以限定多个元件形成区域;多晶硅浮置栅极，通过第一绝缘层设置在每个元件形成区域上; 设置在浮置栅极上的第二绝缘膜，包含设置在第二绝缘膜上的金属元件，多晶硅控制栅极和设置在半导体衬底中的源极/漏极区域，包含金属的多晶硅导电层 元件和由浮置栅极中包含的硅元素和控制栅极组成的混合氧化物材料的硅酸盐层和包含在第二绝缘膜中的金属元素构成的互扩散层设置在每个浮动栅极的表面上 门和控制门。

    SEMICONDUCTOR MEMORY DEVICE AND METHOD OF MANUFACTURING THE SAME
    7.
    发明申请
    SEMICONDUCTOR MEMORY DEVICE AND METHOD OF MANUFACTURING THE SAME 有权
    半导体存储器件及其制造方法

    公开(公告)号：US20080176389A1

    公开(公告)日：2008-07-24

    申请号：US12054089

    申请日：2008-03-24

    申请人： Masayuki Tanaka ,  Yoshio Ozawa ,  Hirokazu Ishida ,  Katsuaki Natori ,  Seiji Inumiya

    发明人： Masayuki Tanaka ,  Yoshio Ozawa ,  Hirokazu Ishida ,  Katsuaki Natori ,  Seiji Inumiya

    IPC分类号： H01L21/4763

    CPC分类号： H01L29/7881 ,  G11C16/0483 ,  H01L21/28273 ,  H01L27/115 ,  H01L27/11521 ,  H01L29/42324 ,  H01L29/513

    摘要： A semiconductor memory device includes a semiconductor substrate, an isolation insulation film filled in a plurality of trenches formed in the semiconductor substrate to define a plurality of element formation regions, a floating gate of polysilicon provided on each of the element formation regions through a first insulation film, a second insulation film, provided on the floating gate, containing a metal element, a control gate of polysilicon, provided on the second insulation film, and source/drain regions provided in the semiconductor substrate, both a polysilicon conductive layer containing a metal element and a mutual diffusion layer composed of a silicate layer of a mixed oxide material composed of a silicon element contained in the floating gate and the control gate and a metal element contained in the second insulation film are provided on a surface of each of the floating gate and the control gate, respectively.

    摘要翻译： 半导体存储器件包括半导体衬底，隔离绝缘膜，填充在形成于半导体衬底中的多个沟槽中，以限定多个元件形成区域;多晶硅浮置栅极，通过第一绝缘层设置在每个元件形成区域上; 设置在浮置栅极上的第二绝缘膜，包含设置在第二绝缘膜上的金属元件，多晶硅控制栅极和设置在半导体衬底中的源极/漏极区域，包含金属的多晶硅导电层 元件和由浮置栅极中包含的硅元素和控制栅极组成的混合氧化物材料的硅酸盐层和包含在第二绝缘膜中的金属元素构成的互扩散层设置在每个浮动栅极的表面上 门和控制门。

    Semiconductor memory device and method of manufacturing the same
    8.
    发明授权
    Semiconductor memory device and method of manufacturing the same 有权
    半导体存储器件及其制造方法

    公开(公告)号：US07294878B2

    公开(公告)日：2007-11-13

    申请号：US11088947

    申请日：2005-03-25

    申请人： Masayuki Tanaka ,  Yoshio Ozawa ,  Hirokazu Ishida ,  Katsuaki Natori ,  Seiji Inumiya

    发明人： Masayuki Tanaka ,  Yoshio Ozawa ,  Hirokazu Ishida ,  Katsuaki Natori ,  Seiji Inumiya

    IPC分类号： H01L27/108

    CPC分类号： H01L29/7881 ,  G11C16/0483 ,  H01L21/28273 ,  H01L27/115 ,  H01L27/11521 ,  H01L29/42324 ,  H01L29/513

    摘要： A semiconductor memory device includes a semiconductor substrate, an isolation insulation film filled in a plurality of trenches formed in the semiconductor substrate to define a plurality of element formation regions, a floating gate provided on each of the element formation regions through a first gate insulation film, a control gate provided on the floating gate through a second gate insulation film, and source/drain regions provided in the semiconductor substrate, wherein a mutual diffusion layer is provided at least at an interface between the second gate insulation film and the control gate.

    摘要翻译： 半导体存储器件包括半导体衬底，隔离绝缘膜，填充在形成于半导体衬底中的多个沟槽中以限定多个元件形成区域;浮置栅极，通过第一栅极绝缘膜设置在每个元件形成区域上 ，通过第二栅极绝缘膜设置在浮置栅极上的控制栅极和设置在半导体衬底中的源极/漏极区域，其中至少在第二栅极绝缘膜和控制栅极之间的界面处设置相互扩散层。

    NONVOLATILE SEMICONDUCTOR MEMORY DEVICE AND MANUFACTURING METHOD FOR THE SAME
    9.
    发明申请
    NONVOLATILE SEMICONDUCTOR MEMORY DEVICE AND MANUFACTURING METHOD FOR THE SAME 审中-公开
    非易失性半导体存储器件及其制造方法

    公开(公告)号：US20100213534A1

    公开(公告)日：2010-08-26

    申请号：US12709154

    申请日：2010-02-19

    申请人： Katsuyuki SEKINE ,  Katsuaki Natori ,  Tetsuya Kai ,  Yoshio Ozawa

    发明人： Katsuyuki SEKINE ,  Katsuaki Natori ,  Tetsuya Kai ,  Yoshio Ozawa

    IPC分类号： H01L29/788 ,  H01L21/28

    CPC分类号： H01L27/11521 ,  H01L27/11519 ,  H01L29/40114 ,  H01L29/42336

    摘要： In a nonvolatile semiconductor memory device provided with memory cell transistors, each of the memory cell transistors has a tunnel insulating film, a floating gate electrode, an inter-electrode insulating film, and element isolation insulating films respectively. The floating gate electrode on the tunnel insulating film is provided with a first floating gate electrode and a second floating gate electrode formed sequentially from the bottom, the second floating gate electrode being narrower in a channel-width direction than the first one. Levels of upper surfaces of the element isolation insulating films and the first floating gate electrode are the same. The inter-electrode insulating film continuously covers the upper and side surfaces of the floating gate electrode and the upper surfaces of the element isolation insulating films, and is higher in a nitrogen concentration in a boundary portion to the floating gate electrode than in boundary portions to the element isolation insulating films.

    摘要翻译： 在设置有存储单元晶体管的非易失性半导体存储器件中，每个存储单元晶体管分别具有隧道绝缘膜，浮栅电极，电极间绝缘膜和元件隔离绝缘膜。 隧道绝缘膜上的浮栅电极设置有从底部顺序形成的第一浮栅电极和第二浮栅电极，第二浮栅电极在沟道宽度方向比第一浮栅电极和第一浮栅电极窄。 元件隔离绝缘膜和第一浮栅电极的上表面的电平相同。 电极间绝缘膜连续地覆盖浮置栅电极的上表面和元件隔离绝缘膜的上表面，并且在与栅极电极的边界部分的氮浓度相比高于边界部分 元件隔离绝缘膜。

    SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME
    10.
    发明申请
    SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME 有权
    半导体器件及其制造方法

    公开(公告)号：US20120112263A1

    公开(公告)日：2012-05-10

    申请号：US13351965

    申请日：2012-01-17

    申请人： Masayuki Tanaka ,  Daikuse Nishida ,  Ryota Fujitsuka ,  Katsuyuki Sekine ,  Akihito Yamamoto ,  Katsuaki Natori ,  Yoshio Ozawa

    发明人： Masayuki Tanaka ,  Daikuse Nishida ,  Ryota Fujitsuka ,  Katsuyuki Sekine ,  Akihito Yamamoto ,  Katsuaki Natori ,  Yoshio Ozawa

    IPC分类号： H01L29/788

    CPC分类号： H01L29/42324 ,  H01L27/115 ,  H01L27/11521 ,  H01L29/7883

    摘要： A semiconductor device includes a semiconductor substrate, a first insulating film formed on the semiconductor substrate, a charge storage layer formed on the first insulating film, a second insulating film formed on the charge storage layer, and a control electrode formed on the second insulating film, the second insulating film including a lower silicon nitride film, a lower silicon oxide film formed on the lower silicon nitride film, an intermediate insulating film formed on the lower silicon oxide film and containing a metal element, the intermediate insulating film having a relative dielectric constant of greater than 7, an upper silicon oxide film formed on the intermediate insulating film, and an upper silicon nitride film formed on the upper silicon oxide film.

    摘要翻译： 半导体器件包括半导体衬底，形成在半导体衬底上的第一绝缘膜，形成在第一绝缘膜上的电荷存储层，形成在电荷存储层上的第二绝缘膜，以及形成在第二绝缘膜上的控制电极 ，所述第二绝缘膜包括下氮化硅膜，形成在所述下氮化硅膜上的下氧化硅膜，形成在所述下氧化硅膜上并含有金属元素的中间绝缘膜，所述中间绝缘膜具有相对电介质 大于7的常数，形成在中间绝缘膜上的上部氧化硅膜和形成在上部氧化硅膜上的上部氮化硅膜。