公开(公告)号：US20210201995A1

公开(公告)日：2021-07-01

申请号：US16729731

申请日：2019-12-30

Applicant: Micron Technology, Inc.

Inventor： Hernan A. Castro ,  Jeremy M. Hirst ,  Shanky K. Jain ,  Richard K. Dodge ,  William A. Melton

IPC: G11C13/00

Abstract: The present disclosure includes apparatuses, methods, and systems for three-state programming of memory cells. An embodiment includes a memory having a plurality of memory cells, and circuitry configured to program a memory cell of the plurality of memory cells to one of three possible data states by applying a voltage pulse to the memory cell, determining whether the memory cell snaps back in response to the applied voltage pulse, and applying an additional voltage pulse to the memory cell based on the determination of whether the memory cell snaps back.

公开(公告)号：US20200090715A1

公开(公告)日：2020-03-19

申请号：US16694133

申请日：2019-11-25

Applicant: Micron Technology, Inc.

Inventor： Richard K. Dodge ,  Timothy C. Langtry

IPC: G11C8/10 ,  G11C13/00 ,  G11C8/14 ,  G11C7/18 ,  G11C5/02 ,  G11C7/10 ,  G11C8/16 ,  G11C5/06

Abstract: In an example, an apparatus includes a memory array in a first region and decode circuitry in a second region separate from a semiconductor. The decode circuitry is coupled to an access line in the memory array.

公开(公告)号：US10573362B2

公开(公告)日：2020-02-25

申请号：US15689017

申请日：2017-08-29

Applicant: Micron Technology, Inc.

Inventor： Richard K. Dodge ,  Timothy C. Langtry

IPC: G11C13/00 ,  G11C8/10 ,  G11C7/10 ,  G11C8/16 ,  G11C5/06

Abstract: In an example, an apparatus includes a memory array in a first region and decode circuitry in a second region separate from a semiconductor. The decode circuitry is coupled to an access line in the memory array.