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公开(公告)号:US20240312534A1
公开(公告)日:2024-09-19
申请号:US18669140
申请日:2024-05-20
Applicant: Micron Technology, Inc.
Inventor: Jeremy M. Hirst , Shanky K. Jain , Hernan A. Castro , Richard K. Dodge , William A. Melton
CPC classification number: G11C16/34 , G06F16/219 , G06F16/587 , G11C11/5614 , G11C13/0004 , G11C13/0069 , G11C16/12 , G11C16/26 , G11C2213/77
Abstract: The present disclosure includes apparatuses, methods, and systems for multi-state programming of memory cells. An embodiment includes a memory having a plurality of memory cells, and circuitry configured to program a memory cell of the plurality of memory cells to one of a plurality of possible data states by applying a voltage pulse to the memory cell, determining the memory cell snaps back in response to the applied voltage pulse, turning off a current to the memory cell upon determining the memory cell snaps back, and applying a number of additional voltage pulses to the memory cell after turning off the current to the memory cell.
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公开(公告)号:US20240120006A1
公开(公告)日:2024-04-11
申请号:US18545245
申请日:2023-12-19
Applicant: Micron Technology, Inc.
Inventor: Hernan A. Castro , Jeremy M. Hirst , Shanky K. Jain , Richard K. Dodge , William A. Melton
IPC: G11C13/00
CPC classification number: G11C13/0069 , G11C13/003 , G11C13/004 , G11C2013/0078 , G11C2213/15 , G11C2213/71
Abstract: The present disclosure includes apparatuses, methods, and systems for three-state programming of memory cells. An embodiment includes a memory having a plurality of memory cells, and circuitry configured to program a memory cell of the plurality of memory cells to one of three possible data states by applying a voltage pulse to the memory cell, determining whether the memory cell snaps back in response to the applied voltage pulse, and applying an additional voltage pulse to the memory cell based on the determination of whether the memory cell snaps back.
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公开(公告)号:US11869588B2
公开(公告)日:2024-01-09
申请号:US17727493
申请日:2022-04-22
Applicant: Micron Technology, Inc.
Inventor: Hernan A Castro , Jeremy M. Hirst , Shanky K. Jain , Richard K. Dodge , William A. Melton
IPC: G11C13/00
CPC classification number: G11C13/0069 , G11C13/003 , G11C13/004 , G11C2013/0078 , G11C2213/15 , G11C2213/71
Abstract: The present disclosure includes apparatuses, methods, and systems for three-state programming of memory cells. An embodiment includes a memory having a plurality of memory cells, and circuitry configured to program a memory cell of the plurality of memory cells to one of three possible data states by applying a voltage pulse to the memory cell, determining whether the memory cell snaps back in response to the applied voltage pulse, and applying an additional voltage pulse to the memory cell based on the determination of whether the memory cell snaps back.
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公开(公告)号:US20220075817A1
公开(公告)日:2022-03-10
申请号:US17526121
申请日:2021-11-15
Applicant: Micron Technology, Inc.
Inventor: Jeremy M. Hirst , Shanky K. Jain , Hernan A. Castro , Richard K. Dodge , William A. Melton
IPC: G06F16/587 , G06F16/21
Abstract: The present disclosure includes apparatuses, methods, and systems for multi-state programming of memory cells. An embodiment includes a memory having a plurality of memory cells, and circuitry configured to program a memory cell of the plurality of memory cells to one of a plurality of possible data states by applying a voltage pulse to the memory cell, determining the memory cell snaps back in response to the applied voltage pulse, turning off a current to the memory cell upon determining the memory cell snaps back, and applying a number of additional voltage pulses to the memory cell after turning off the current to the memory cell.
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公开(公告)号:US20210202018A1
公开(公告)日:2021-07-01
申请号:US16729787
申请日:2019-12-30
Applicant: Micron Technology, Inc.
Inventor: Jeremy M. Hirst , Shanky K. Jain , Hernan A. Castro , Richard K. Dodge , William A. Melton
Abstract: The present disclosure includes apparatuses, methods, and systems for multi-state programming of memory cells. An embodiment includes a memory having a plurality of memory cells, and circuitry configured to program a memory cell of the plurality of memory cells to one of a plurality of possible data states by applying a voltage pulse to the memory cell, determining the memory cell snaps back in response to the applied voltage pulse, turning off a current to the memory cell upon determining the memory cell snaps back, and applying a number of additional voltage pulses to the memory cell after turning off the current to the memory cell.
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公开(公告)号:US20210201995A1
公开(公告)日:2021-07-01
申请号:US16729731
申请日:2019-12-30
Applicant: Micron Technology, Inc.
Inventor: Hernan A. Castro , Jeremy M. Hirst , Shanky K. Jain , Richard K. Dodge , William A. Melton
IPC: G11C13/00
Abstract: The present disclosure includes apparatuses, methods, and systems for three-state programming of memory cells. An embodiment includes a memory having a plurality of memory cells, and circuitry configured to program a memory cell of the plurality of memory cells to one of three possible data states by applying a voltage pulse to the memory cell, determining whether the memory cell snaps back in response to the applied voltage pulse, and applying an additional voltage pulse to the memory cell based on the determination of whether the memory cell snaps back.
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公开(公告)号:US11989228B2
公开(公告)日:2024-05-21
申请号:US17526121
申请日:2021-11-15
Applicant: Micron Technology, Inc.
Inventor: Jeremy M. Hirst , Shanky K. Jain , Hernan A. Castro , Richard K Dodge , William A. Melton
IPC: G06F16/587 , G06F16/21 , G11C11/56 , G11C13/00
CPC classification number: G06F16/587 , G06F16/219 , G11C11/5614 , G11C13/0004 , G11C13/0069 , G11C2213/77
Abstract: The present disclosure includes apparatuses, methods, and systems for multi-state programming of memory cells. An embodiment includes a memory having a plurality of memory cells, and circuitry configured to program a memory cell of the plurality of memory cells to one of a plurality of possible data states by applying a voltage pulse to the memory cell, determining the memory cell snaps back in response to the applied voltage pulse, turning off a current to the memory cell upon determining the memory cell snaps back, and applying a number of additional voltage pulses to the memory cell after turning off the current to the memory cell.
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公开(公告)号:US20220246210A1
公开(公告)日:2022-08-04
申请号:US17727493
申请日:2022-04-22
Applicant: Micron Technology, Inc.
Inventor: Hernan A. Castro , Jeremy M. Hirst , Shanky K. Jain , Richard K. Dodge , William A. Melton
IPC: G11C13/00
Abstract: The present disclosure includes apparatuses, methods, and systems for three-state programming of memory cells. An embodiment includes a memory having a plurality of memory cells, and circuitry configured to program a memory cell of the plurality of memory cells to one of three possible data states by applying a voltage pulse to the memory cell, determining whether the memory cell snaps back in response to the applied voltage pulse, and applying an additional voltage pulse to the memory cell based on the determination of whether the memory cell snaps back.
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公开(公告)号:US11315633B2
公开(公告)日:2022-04-26
申请号:US16729731
申请日:2019-12-30
Applicant: Micron Technology, Inc.
Inventor: Hernan A. Castro , Jeremy M. Hirst , Shanky K. Jain , Richard K. Dodge , William A. Melton
IPC: G11C13/00
Abstract: The present disclosure includes apparatuses, methods, and systems for three-state programming of memory cells. An embodiment includes a memory having a plurality of memory cells, and circuitry configured to program a memory cell of the plurality of memory cells to one of three possible data states by applying a voltage pulse to the memory cell, determining whether the memory cell snaps back in response to the applied voltage pulse, and applying an additional voltage pulse to the memory cell based on the determination of whether the memory cell snaps back.
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公开(公告)号:US11177009B2
公开(公告)日:2021-11-16
申请号:US16729787
申请日:2019-12-30
Applicant: Micron Technology, Inc.
Inventor: Jeremy M. Hirst , Shanky K. Jain , Hernan A. Castro , Richard K. Dodge , William A. Melton
Abstract: The present provision includes apparatuses, methods, and systems for multi-state programming of memory cells. An embodiment includes a memory having a plurality of memory cells, and circuitry configured to program a memory cell of the plurality of memory cells to one of a plurality of possible data states by applying a voltage pulse to the memory cell, determining the memory cell snaps back in response to the applied voltage pulse, turning off a current to the memory cell upon determining the memory cell snaps back, and applying a number of additional voltage pulses to the memory cell after turning off the current to the memory cell.
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