Communications device and method of communications

    公开(公告)号:US11451365B2

    公开(公告)日:2022-09-20

    申请号:US16833398

    申请日:2020-03-27

    Applicant: NXP B.V.

    Abstract: Methods for communications and of communication device involve determining a half-duplex communications mode for a communications device, and in response to determining the half-duplex communications mode for the communications device, disabling an echo canceller of the communications device and determining a time-division multiplex (TDM) communications schedule over a point-to-point communications link. In response to disabling the echo canceller and determining the TDM communications schedule over the point-to-point communications link, data transmission is conducted over the point-to-point communications link according to the TDM communications schedule without echo cancellation at the communications device. The TDM communications schedule specifies non-overlapping transmission time slots for different communications devices and a silent period for echo fade-out between consecutive transmission time slots of the non-overlapping transmission time slots.

    TRANSCEIVER-BASED HANDSHAKE/POWER-REDUCTION

    公开(公告)号:US20210282087A1

    公开(公告)日:2021-09-09

    申请号:US16827525

    申请日:2020-03-23

    Applicant: NXP B.V.

    Abstract: Exemplary aspects are directed to transceivers interlinked in a communication system, for example, in respective circuit-based nodes installed in battery-operated vehicle or other apparatus. Representative of the communication system are a first transceiver and a second transceiver which communicate with one another over a communication link, with the first transceiver initiating a request over the link to the second transceiver. The second transceiver may receive the request and, for a period of time in response to receiving to the request, monitor the link to detect whether any further signaling on the link by the first transceiver indicates to accept the request. In certain other more specific examples, the above aspects are used as part of a handshake protocol to mitigate delays and related issues in coordinating timely actions associated with the request.

    Apparatuses and methods involving managing port-address assignments

    公开(公告)号:US11115264B2

    公开(公告)日:2021-09-07

    申请号:US16457069

    申请日:2019-06-28

    Applicant: NXP B.V.

    Abstract: An example apparatus for a local area network. The apparatus includes, at one of a plurality of logic nodes, a plurality of ports and a plurality of shared registers. The plurality of shared registers have a port address table to provide configurable port-address assignments that identify respective ones of the plurality of ports. The apparatus further includes a management interface controller that communicates with the plurality of ports and accesses at least one register via a selected one of the ports, and in response configures or manages the port-address assignments within the port address table.

    Apparatuses and methods involving first type of transaction registers mapped to second type of transaction addresses

    公开(公告)号:US10999097B2

    公开(公告)日:2021-05-04

    申请号:US16456111

    申请日:2019-06-28

    Applicant: NXP B.V.

    Abstract: An example apparatus includes a discernment logic circuit and logic circuitry. The discernment logic circuit discerns whether a requested communications transaction received over the management communications bus from another of the plurality of logic nodes involves a first type of transaction or a second type of transaction. The second type of transaction has a plurality of commands associated with the requested communication transaction to convey respectively different parts of the requested communications transaction including an address part and a data part. The logic circuitry accesses, in response to discerning that the requested communications transaction involves the second type of transaction, a register of the plurality of registers associated with the first type of transaction, wherein the plurality of registers associated with the first type of transaction are mapped into a set of addresses for the second type of transaction.

    SPEED IMPROVEMENT FOR A DECISION FEEDBACK EQUALIZER
    25.
    发明申请
    SPEED IMPROVEMENT FOR A DECISION FEEDBACK EQUALIZER 有权
    决策反馈均衡器的速度改进

    公开(公告)号:US20150256362A1

    公开(公告)日:2015-09-10

    申请号:US14202751

    申请日:2014-03-10

    Applicant: NXP B.V.

    Abstract: Circuits, apparatus, and methods are disclosed for decision feedback equalization. In one embodiment, an apparatus includes a plurality of time-interleaved slices for processing an input data stream. Each of the slices includes a sampler circuit, a multiplexer, and a latch. In each slice, the multiplexer and the sampler circuit provide sampled output data corresponding to one of a plurality of different versions of the input data stream at times designated uniquely for the slice, according to one or more selection signals. The selection signals are derived from a output of the multiplexer of at least one other of the time-interleaved slices. The latch provides a controlled output in response to the multiplexer and the sampler circuit, as a function of the designated unique times.

    Abstract translation: 公开了用于判决反馈均衡的电路,装置和方法。 在一个实施例中,一种装置包括用于处理输入数据流的多个时间交错切片。 每个片包括采样器电路,多路复用器和锁存器。 在每个切片中,多路复用器和采样器电路根据一个或多个选择信号提供对应于输入数据流的多个不同版本中的一个的采样输出数据,该时间是为片唯一地指定的。 选择信号从至少另一个时间交错切片的多路复用器的输出导出。 锁存器响应于多路复用器和采样器电路提供受控输出,作为指定的唯一时间的函数。

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