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公开(公告)号：US20230362368A1
公开(公告)日：2023-11-09
申请号：US18343393
申请日：2023-06-28
Inventor： Chong Soon LIM , Hai Wei SUN , Sughosh Pavan SHASHIDHAR , Han Boon TEO , Ru Ling LIAO , Takahiro NISHI , Tadamasa TOMA
IPC: H04N19/119 , H04N19/176 , H04N19/50 , H04N19/60
CPC classification number: H04N19/119 , H04N19/176 , H04N19/50 , H04N19/60
Abstract: An encoder according to one aspect of the present disclosure encodes a block of an image, and includes a processor and memory connected to the processor. Using the memory, the processor partitions a block into a plurality of sub blocks and encodes a sub block included in the plurality of sub blocks in an encoding process including at least a transform process or a prediction process. The block is partitioned using a multiple partition including at least three odd-numbered child nodes and each of a width and a height of each of the plurality of sub blocks is a power of two.
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公开(公告)号：US20230319300A1
公开(公告)日：2023-10-05
申请号：US18331800
申请日：2023-06-08
Inventor： Chong Soon LIM , Sughosh Pavan SHASHIDHAR , Ru Ling LIAO , Hai Wei SUN , Han Boon TEO , Jing Ya LI , Kiyofumi ABE , Tadamasa TOMA , Takahiro NISHI
IPC: H04N19/44 , H04N19/119 , H04N19/137 , H04N19/159 , H04N19/176
CPC classification number: H04N19/44 , H04N19/119 , H04N19/137 , H04N19/159 , H04N19/176
Abstract: An image decoder has circuitry coupled to a memory. The circuitry splits a current image block into a plurality of partitions. The circuitry predicts a first motion vector from a set of uni-prediction motion vector candidates for a first partition of the plurality of partitions, and decodes the first partition using the first motion vector.
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公开(公告)号：US20220248013A1
公开(公告)日：2022-08-04
申请号：US17725106
申请日：2022-04-20
Inventor： Kiyofumi ABE , Takahiro NISHI , Tadamasa TOMA , Ryuichi KANOH , Chong Soon LIM , Ru Ling LIAO , Hai Wei SUN , Sughosh Pavan SHASHIDHAR , Han Boon TEO , Jing Ya LI
IPC: H04N19/119 , H04N19/52 , H04N19/176 , H04N19/137
Abstract: Provided is an encoder which includes circuitry and memory. Using the memory, the circuitry splits an image block into a plurality of partitions, obtains a prediction image for a partition, and encodes the image block using the prediction image. When the partition is not a non-rectangular partition, the circuitry obtains (i) a first prediction image for the partition, (ii) a gradient image for the first prediction image, and (iii) a second prediction image as the prediction image using the first prediction image and the gradient image. When the partition is a non-rectangular partition, the circuitry obtains the first prediction image as the prediction image without using the gradient image.
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公开(公告)号：US20210258577A1
公开(公告)日：2021-08-19
申请号：US17306483
申请日：2021-05-03
Inventor： Tadamasa TOMA , Takahiro NISHI , Kiyofumi ABE , Ryuichi KANOH , Chong Soon LIM , Sughosh Pavan SHASHIDHAR , Ru Ling LIAO , Hai Wei SUN , Han Boon TEO , Jing Ya LI
IPC: H04N19/119 , H04N19/157 , H04N19/176
Abstract: An encoder partitions into blocks using a set of block partition modes. The set of block partition modes includes a first partition mode for partitioning a first block, and a second block partition mode for partitioning a second block which is one of blocks obtained after the first block is partitioned. When the number of partitions of the first block partition mode is three, the second block is a center block among the blocks obtained after partitioning the first block, and the partition direction of the second block partition mode is same as the partition direction of the first block partition mode, the second block partition mode indicates that the number of partitions is only three. A parameter for identifying the second block partition mode includes a first flag indicating a horizontal or vertical partition direction, and does not include a second flag indicating the number of partitions.
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公开(公告)号：US20210044809A1
公开(公告)日：2021-02-11
申请号：US17077450
申请日：2020-10-22
Inventor： Kiyofumi ABE , Takahiro NISHI , Tadamasa TOMA , Ryuichi KANOH , Chong Soon LIM , Ru Ling LIAO , Hai Wei SUN , Sughosh Pavan SHASHIDHAR , Han Boon TEO , Jing Ya LI
IPC: H04N19/176 , H04N19/52 , H04N19/70 , H04N19/105
Abstract: An encoder, includes: circuitry; and memory. Using the memory, the circuitry: in inter prediction for a current block, determines a base motion vector, and writes, in an encoded signal, a delta motion vector representing (i) one direction among a plurality of directions including a diagonal direction and (ii) a distance from the base motion vector; and encodes the current block using the delta motion vector and the base motion vector as a motion vector of the current block.
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Patent Agency Ranking
公开(公告)号：US20200322625A1
公开(公告)日：2020-10-08
申请号：US16904032
申请日：2020-06-17
Inventor： Kiyofumi ABE , Takahiro NISHI , Tadamasa TOMA , Ryuichi KANOH , Chong Soon LIM , Hai Wei SUN , Sughosh Pavan SHASHIDHAR , Han Boon TEO , Ru Ling LIAO , Jing Ya LI
IPC: H04N19/52 , H04N19/537 , H04N19/513
Abstract: An encoder includes circuitry and memory. The circuitry performs: obtaining first motion vector information of a first partition; obtaining second motion vector information of a second partition; deriving a set of prediction samples for the first partition; and encoding the first partition using the set. When the difference between the motion vector information is not greater than a value, the circuitry reflects a second set of samples to a first set of samples. The first set has been predicted for the first partition using the first motion vector information, and the second set has been predicted for a first range using the second motion vector information. When the difference is greater than the value, the circuitry reflects, to the first set of samples, a third set of samples predicted for a second range larger than the first range using the second motion vector information.
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27.发明申请公开(公告)号：US20200304827A1
公开(公告)日：2020-09-24
申请号：US16894020
申请日：2020-06-05
Inventor： Kiyofumi ABE , Takahiro NISHI , Tadamasa TOMA , Ryuichi KANOH , Chong Soon LIM , Ru Ling LIAO , Hai Wei SUN , Sughosh Pavan SHASHIDHAR , Han Boon TEO , Jing Ya LI
IPC: H04N19/513 , H04N19/563 , H04N19/132 , H04N19/176
Abstract: The present disclosure provides systems and methods for video coding. The systems include, for example, an image encoder comprising: circuitry; and a memory coupled to the circuitry, wherein the circuitry, in operation, performs the following: predicting a first block of prediction samples for a current block of a picture, wherein predicting the first block of prediction samples includes at least a prediction process with a motion vector from a different picture; padding the first block of prediction samples to form a second block of prediction samples, wherein the second block is larger than the first block; calculating at least a gradient using the second block of prediction samples; and encoding the current block using at least the calculated gradient.
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公开(公告)号：US20200014925A1
公开(公告)日：2020-01-09
申请号：US16574728
申请日：2019-09-18
Inventor： Chong Soon LIM , Ru Ling LIAO , Hai Wei SUN , Sughosh Pavan SHASHIDHAR , Han Boon TEO , Takahiro NISHI , Ryuichi KANOH , Tadamasa TOMA
IPC: H04N19/122 , H04N19/176 , H04N19/103 , H04N19/513
Abstract: An encoding apparatus includes: a circuit; and a memory. The circuit, using the memory: writes a first parameter that specifies an arrangement order for a plurality of parameters which includes a second parameter, into a header; writes a second parameter for a block into a bitstream according to the arrangement order wherein the second parameter, when positioned earlier in the arrangement order than later in the arrangement order, is written with less bits; and performs encoding operation for a block using the second parameter.
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公开(公告)号：US20190273938A1
公开(公告)日：2019-09-05
申请号：US16291289
申请日：2019-03-04
Inventor： Kiyofumi ABE , Takahiro NISHI , Tadamasa TOMA , Ryuichi KANOH , Chong Soon LIM , Ru Ling LIAO , Hai Wei SUN , Sughosh Pavan SHASHIDHAR , Han Boon TEO , Jing Ya LI
IPC: H04N19/52 , H04N19/176 , H04N19/70 , H04N19/44
Abstract: An encoder includes circuitry and memory. The circuitry, using the memory: calculates at least one difference value between a plurality of pixels in a first block of a current image; calculates a denominator value used for a second block, using the difference value, the denominator value being used for a plurality of sub-blocks of the first block, the second block being one of the plurality of sub-blocks; determines a shift value, using the denominator value; calculates a first value and a second value, using at least a shift operation with the shift value; determines a prediction sample for the second block, using at least the first value and the second value; and encodes the second block, using at least the prediction sample.
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公开(公告)号：US20190273931A1
公开(公告)日：2019-09-05
申请号：US16417514
申请日：2019-05-20
Inventor： Chong Soon LIM , Hai Wei SUN , Sughosh Pavan SHASHIDHAR , Han Boon TEO , Ru Ling LIAO , Takahiro NISHI , Tadamasa TOMA
IPC: H04N19/196 , H04N19/119 , H04N19/159 , H04N19/176
Abstract: An image encoder/decoder includes circuitry and a memory coupled to the circuitry. When a parameter has a first value, the circuitry splits a block of a picture into sub blocks having a first set of geometries. When the parameter has a value other than the first value, the circuitry splits the block of the picture into sub blocks having a second set of geometries, the second set of geometries being different from the first set of geometries. The circuitry encodes/decodes the sub blocks of the block.
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