公开(公告)号：US5636009A

公开(公告)日：1997-06-03

申请号：US662280

申请日：1996-06-12

申请人： Takao Honda ,  Tsuyoshi Watanabe ,  Tadashi Ishikawa ,  Masanori Muramatsu ,  Isamu Sato ,  Makoto Yanagida ,  Fumihiro Arahira ,  Takeo Yamamoto

发明人： Takao Honda ,  Tsuyoshi Watanabe ,  Tadashi Ishikawa ,  Masanori Muramatsu ,  Isamu Sato ,  Makoto Yanagida ,  Fumihiro Arahira ,  Takeo Yamamoto

IPC分类号： G03G15/00 ,  G03G15/02 ,  G03G15/043 ,  G03G21/00

CPC分类号： G03G15/751 ,  G03G15/0266 ,  G03G15/043 ,  G03G2215/021

摘要： An image forming apparatus includes a movable image bearing member, having a photosensitive layer; an image forming device for forming an image on the image bearing member: a charging member for charging the image bearing member; and a light radiating device for radiating light on the image bearing member; a detector for detecting a datum rotating to a thickness of the photosensitive layer on the basis of the voltage-current characteristic between the charging member and image bearing member; and a controller for controlling the amount of light radiated from the light radiating device to be increased with decrease in the thickness of the photosensitive layer, in response to the detector.

摘要翻译： 图像形成装置包括具有感光层的可动图像承载部件; 图像形成装置，用于在图像承载部件上形成图像;充电部件，用于对图像承载部件充电; 以及用于在图像承载部件上照射光的光辐射装置; 检测器，用于基于充电构件和图像承载构件之间的电压 - 电流特性来检测旋转到感光层的厚度的基准; 并且响应于检测器，用于控制从光辐射装置辐射的光量随着感光层厚度的减小而增加的控制器。

公开(公告)号：US4709319A

公开(公告)日：1987-11-24

申请号：US907153

申请日：1986-09-15

申请人： Kazuyoshi Takahashi ,  Koji Suzuki ,  Joji Nagahira ,  Kunio Yoshihara ,  Toshiro Matsui ,  Tadashi Ishikawa

发明人： Kazuyoshi Takahashi ,  Koji Suzuki ,  Joji Nagahira ,  Kunio Yoshihara ,  Toshiro Matsui ,  Tadashi Ishikawa

IPC分类号： H02M3/335 ,  H02M7/06 ,  H02M7/12 ,  H04N3/18 ,  H03K3/33

CPC分类号： H02M3/335

摘要： There is disclosed a high-voltage power supply device capable of high precise control with a simplified circuitry and with a reduced energy loss in which a high-voltage transformer is controlled by switching means which is driven by a power source including a negative power supply and operated in response to pulse signals.

摘要翻译： 公开了一种能够通过简化的电路进行高精度控制的高压电源装置，并且具有降低的能量损失，其中高压变压器由包括负电源的电源驱动的开关装置控制， 响应于脉冲信号操作。

公开(公告)号：US4707799A

公开(公告)日：1987-11-17

申请号：US695346

申请日：1985-01-28

申请人： Tadashi Ishikawa ,  Kazutoshi Eguchi

发明人： Tadashi Ishikawa ,  Kazutoshi Eguchi

IPC分类号： G06F7/494 ,  G06F7/50

CPC分类号： G06F7/494 ,  G06F2207/3896 ,  G06F2207/4924

摘要： A bit sliced decimal adding/subtracting unit includes an 8-digit decimal adder/subtracter and an offset data generator. In the 8-digit decimal adder/subtracter, eight 1-digit decimal adder/subtracters are intercoupled so as to allow a carry to propagate from the lower order digit to the higher order digit. The offset data generator has first and second logical gates. The first logical gate detects whether or not an addition mode is specified by operation mode data. The second logical gate determines that a signal ZONE representing the format of the data to be operated represents a zone format, and that the addition mode is detected by said first logical gate. The output signal from the first logical gate is used for the first and second bits of the first 4-bit offset data. The output signal from the second logical gate is used for the 0th bit (MSB) and the third bit (LSB) of the first offset data. The output signal from the first logical gate is also used for the first and second bits of second 4-bit offset data. The 0th bit and the third bit of the second offset data are fixed at logical 0. The first offset data is supplied to the offset inputs of the adder/subtracters at the even digits (where the most significant digit is the 0th digit, and the least significant digit is the seventh digit) of the eight 1-digit decimal adder/subtracters. The second offset data is supplied to the offset inputs of the adder/subtracters at the odd number digits of the eight 1-digit decimal adder/subtracters.

摘要翻译： 一个十进位加减法单位包括一个8位十进制加减法器和一个偏移数据发生器。 在8位十进制加减法器中，8位1位十位加法器/减法器相互配合，以便允许进位从低位数传播到高位数字。 偏移数据发生器具有第一和第二逻辑门。 第一逻辑门检测是否通过操作模式数据指定相加模式。 第二逻辑门确定表示要被操作的数据的格式的信号ZONE表示区格式，并且所述第一逻辑门检测相加模式。 来自第一逻辑门的输出信号用于第一个4位偏移数据的第一和第二位。 来自第二逻辑门的​​输出信号用于第一偏移数据的第0位（MSB）和第3位（LSB）。 来自第一逻辑门的输出信号也用于第二4位偏移数据的第一和第二位。 第二偏移数据的第0位和第3位被固定为逻辑0.第一偏移数据以偶数（最高有效位为第0位）提供给加法器/减法器的偏移输入，并且 八位1位十进制加减法器的最低有效位是第七位）。 第二个偏移数据以8位1位十位加法器/减法器的奇数位提供给加法器/减法器的偏移输入。

公开(公告)号：US4376994A

公开(公告)日：1983-03-15

申请号：US218184

申请日：1980-12-19

申请人： Masuo Ogihara ,  Nobuo Shinozaki ,  Tadashi Ishikawa ,  Yoichi Seki

发明人： Masuo Ogihara ,  Nobuo Shinozaki ,  Tadashi Ishikawa ,  Yoichi Seki

IPC分类号： G04B23/02 ,  G04C21/20 ,  G04C23/16 ,  G04C21/16

CPC分类号： G04B23/021 ,  G04C21/205

摘要： The cam type time detecting mechanism of an alarm clock has a time gear wheel, an alarm gear wheel and a detecting plate, all mounted on a shaft. A hole is formed on either the alarm gear wheel or the detecting plate and a projection is formed on the other. The detecting plate is movable on the shaft in the axial direction of the shaft. The time gear wheel and the detecting plate have guiding parts respectively so that the time gear wheel, in its normal rotation, continuously pushes and turns the detecting plate. At least one of the time gear wheel, the alarm gear wheel and the detecting plate has a cam for lifting up the detecting plate if the time gear wheel and the alarm gear wheel turn either in normal and reverse directions.

摘要翻译： 闹钟的凸轮型时间检测机构具有时间齿轮，报警齿轮和检测板，全部安装在轴上。 在报警齿轮或检测板上形成一个孔，另一个形成一个突起。 检测板可以在轴上沿轴的轴向移动。 时间齿轮和检测板分别具有引导部件，使得时间齿轮在其正常旋转中连续地推动并转动检测板。 齿轮，报警齿轮和检测板中的至少一个齿轮和报警齿轮在正反方向转动时，都有一个用于提升检测板的凸轮。

公开(公告)号：US20070000968A1

公开(公告)日：2007-01-04

申请号：US10572828

申请日：2004-10-07

申请人： Tadashi Ishikawa ,  Takehiro Inoue ,  Hiroshi Shimanuki ,  Tadashi Koseki

发明人： Tadashi Ishikawa ,  Takehiro Inoue ,  Hiroshi Shimanuki ,  Tadashi Koseki

IPC分类号： A47J36/02

CPC分类号： B23K9/042

摘要： A welding method for manufacturing welded structures having excellent properties to prevent the propagation of brittle fracture occurring in welded joints, characterized by the step of forming a repair weld having a greater toughness than that of a butt weld and an outer edge whose angle φ with respect to the longitudinal direction of the butt weld is not less than 10 degrees and not more than 60 degrees, by applying repair welding to a region to arrest a brittle crack in a butt-welded joint where a brittle crack is likely to propagate after removing part of the butt-welded joint, in said region, by gouging or machining.

摘要翻译： 一种用于制造焊接结构的焊接方法，其具有优异的性能以防止在焊接接头中发生的脆性断裂的传播，其特征在于，形成具有比对焊的韧性更大的韧性的修补焊接的步骤和与 对接焊缝的纵向方向不小于10度且不超过60度，通过对区域进行修补焊接以阻止脆性裂纹在去除部件之后易于传播的对接焊接头中的脆性裂纹 的对接焊缝，在所述区域，通过气刨或机加工。

公开(公告)号：US6038631A

公开(公告)日：2000-03-14

申请号：US910172

申请日：1997-08-13

申请人： Shinichiro Suzuki ,  Yoichiro Takeuchi ,  Tadashi Ishikawa ,  Ikuo Uchihori ,  Takayuki Yagi

发明人： Shinichiro Suzuki ,  Yoichiro Takeuchi ,  Tadashi Ishikawa ,  Ikuo Uchihori ,  Takayuki Yagi

IPC分类号： G06F12/10 ,  G06F9/38 ,  G06F9/48 ,  G06F12/08 ,  G06F9/46

CPC分类号： G06F9/383 ,  G06F12/08 ,  G06F9/3861

摘要： In executing indivisible operations to be executed without being interrupted, pseudo-store instructions PST which do not perform data writing are used to perform a check for the presence or absence in a memory of pages necessary for execution of the indivisible operations. In the event of absence of the necessary pages, the necessary pages are pre-stored in the memory. This prevents the generation of page fault interruptions during the execution of an indivisible operation, thereby enabling the indivisible operation to be implemented on a software basis. A disable interrupt instruction is executed prior to the execution of the indivisible operation as required, and data indicating an address of the disable interrupt instruction is preserved in order to return to the disable interrupt instruction. In the case where an interruption, such as a page fault interruption, which cannot be disabled even in a interrupt disabled state is generated during data processing, processing is resumed from the disable interrupt instruction after the termination of processing for the interruption or an asynchronous interruption, with reference to the address.

摘要翻译： 在执行不中断执行的不可分割的操作时，不执行数据写入的伪存储指令PST用于执行对执行不可分割操作所必需的页面的存在或不存在的检查。 在没有必要的页面的情况下，所需的页面被预先存储在存储器中。 这防止在执行不可分割的操作期间产生页面错误中断，从而使得可以基于软件实现不可分割的操作。 在根据需要执行不可分割的操作之前执行禁用中断指令，并且保留指示禁止中断指令的地址的数据以返回到禁止中断指令。 在数据处理期间产生即使在中断禁止状态下也不能被禁止的诸如页面故障中断的中断的情况，在中断处理结束或异步中断之后，从禁止中断指令恢复处理 参考地址。

公开(公告)号：US5283891A

公开(公告)日：1994-02-01

申请号：US926174

申请日：1992-08-07

申请人： Shinichiro Suzuki ,  Yoichiro Takeuchi ,  Ikuo Uchihori ,  Tadashi Ishikawa ,  Ryuji Sakai

发明人： Shinichiro Suzuki ,  Yoichiro Takeuchi ,  Ikuo Uchihori ,  Tadashi Ishikawa ,  Ryuji Sakai

IPC分类号： G06F11/00 ,  G06F11/07

CPC分类号： G06F11/0772 ,  G06F11/0721

摘要： An error information saving apparatus of a computer includes at least one arithmetic unit, a plurality of storage units, and a control unit, connected to the storage units and the arithmetic unit, for controlling these units to perform a predetermined pipeline operation, wherein the storage units comprise an arithmetic register file consisting of a plurality of registers each of which can be designated as a destination operand in a statement of an operation instruction, a status flag string consisting of a plurality of flags provided in a one-to-one correspondence with the registers of the arithmetic register file, and a destination register number holding unit for sequentially saving and holding the numbers of destination registers of all operations performed while error interrupt processing generated after occurrence of an error is delayed by a predetermined time interval, each time one of the operations is completed.

摘要翻译： 计算机的误差信息保存装置包括连接到存储单元和运算单元的至少一个算术单元，多个存储单元和控制单元，用于控制这些单元执行预定的流水线操作，其中存储 单元包括由多个寄存器组成的算术寄存器文件，每个寄存器可以在操作指令的语句中被指定为目的地操作数，状态标志串由与一个对应地提供的多个标志组成 算术寄存器文件的寄存器和目的地寄存器号码保持单元，用于在发生错误发生时产生的错误中断处理期间，顺序保存和保持执行的所有操作的目的地寄存器的数量被延迟预定时间间隔，每次一个 的操作完成。

公开(公告)号：US5175577A

公开(公告)日：1992-12-29

申请号：US798352

申请日：1991-11-21

申请人： Nobuo Shinozaki ,  Hiroyuki Koizumi ,  Atsushi Takami ,  Tadashi Ishikawa

发明人： Nobuo Shinozaki ,  Hiroyuki Koizumi ,  Atsushi Takami ,  Tadashi Ishikawa

IPC分类号： G02B7/08

CPC分类号： G02B7/08

摘要： An automatic focusing system for a camera comprises a motor rotatable in opposite directions, a drive member driven for rotation by the motor, a distance-setting member rotatable together with the drive member to place an objective lens in an initial position and movable to a predetermined forward position, and a holding mechanism for holding the distance-setting member in the predetermined forward position. The position of the drive member is identified at each monitoring point, and a position identification signal is generated. The sequence of movement of the distance-setting member is analyzed from a starting position to the predetermined forward position. The system further provides for preventing improper holding of the distance-setting member at its initial position.

摘要翻译： 一种用于照相机的自动对焦系统包括可沿相反方向旋转的电动机，被驱动以由电动机转动的驱动部件，与驱动部件一起旋转的距离设定部件，以将物镜放置在初始位置并可移动到预定的位置 以及用于将距离设定构件保持在预定向前位置的保持机构。 在每个监测点识别驱动构件的位置，并产生位置识别信号。 从起始位置到预定的向前位置分析距离设定构件的移动顺序。 该系统进一步提供防止距离设定构件在其初始位置的不正确保持。

公开(公告)号：US5113501A

公开(公告)日：1992-05-12

申请号：US353196

申请日：1989-05-16

申请人： Tadashi Ishikawa

发明人： Tadashi Ishikawa

IPC分类号： G06F11/28 ,  G06F9/22 ,  G06F11/34 ,  G06F11/36

CPC分类号： G06F11/3688

摘要： An apparatus capable of checking the validity of a microprogram, includes an initializing unit for initializing data representing the validity of each microinstruction of a microprogram to be tested (the validity indicating that each microinstruction is executed), an updating unit for updating the validity data associated with a microinstruction executed when the to-be-tested microprogram is executed, and a reading unit for reading out the validity data when execution of the to-be-tested microprogram is completed.

摘要翻译： 一种能够检查微程序的有效性的装置，包括初始化单元，用于初始化表示要测试的微程序的每个微指令的有效性的数据（指示执行每个微指令的有效性），更新单元，用于更新相关的有效性数据 当执行待测试的微程序时执行微指令;以及读取单元，用于在执行待测试的微程序完成时读出有效性数据。

公开(公告)号：US4945255A

公开(公告)日：1990-07-31

申请号：US175571

申请日：1988-03-28

申请人： Koji Suzuki ,  George Nagahira ,  Kazuyoshi Takahashi ,  Kunio Yoshihara ,  Toshiro Matsui ,  Tadashi Ishikawa

发明人： Koji Suzuki ,  George Nagahira ,  Kazuyoshi Takahashi ,  Kunio Yoshihara ,  Toshiro Matsui ,  Tadashi Ishikawa

IPC分类号： H02M7/10

CPC分类号： H02M7/106 ,  Y10T307/297

摘要： A power source device including a lower voltage inverter transformer having plural secondary windings and a higher voltage inverter transformer having a primary winding connected directly to one of the secondary windings of the lower voltage inverter transformer without any rectifying circuit or inverter circuit interposed therebetween. The lower voltage and higher voltage transformers are contained in the same casing, the internal space of which is filled with an electrically insulative material to provide a unit device.

摘要翻译： 一种电源装置，包括具有多个次级绕组的低压逆变器变压器和具有直接连接到所述低压逆变器变压器的一个次级绕组的初级绕组的较高电压的逆变器变压器，其中没有任何整流电路或逆变器电路。 较低电压和较高电压互感器被包含在同一壳体中，其内部空间填充有电绝缘材料以提供单元装置。