公开(公告)号：US20200035715A1

公开(公告)日：2020-01-30

申请号：US16591859

申请日：2019-10-03

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： BYOUNG KWON CHOO ,  Joon Hwa Bae ,  Hyun Jin Cho ,  Jun Hyuk Cheon ,  Zi Yeon Yoon ,  Woo Jin Cho ,  Sung Hwan Chol ,  Jeong Hye Choi

IPC: H01L27/12 ,  H01L29/66 ,  H01L29/786 ,  H01L21/321 ,  G02F1/1368 ,  G02F1/1362 ,  H01L27/32

Abstract: A thin-film transistor (TFT) array substrate is provided. The TFT array substrate includes a base substrate, a semiconductor layer disposed on the base substrate, an insulating layer disposed on the semiconductor layer, and a gate electrode disposed on the insulating layer. A top surface of a portion of the insulating layer overlapping the semiconductor layer in a plan view of the base substrate and a top surface of the gate electrode are placed on the same level.

公开(公告)号：US10475817B2

公开(公告)日：2019-11-12

申请号：US15971435

申请日：2018-05-04

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： Byoung Kwon Choo ,  Joon Hwa Bae ,  Hyun Jin Cho ,  Jun Hyuk Cheon ,  Zi Yeon Yoon ,  Woo Jin Cho ,  Sung Hwan Choi ,  Jeong Hye Choi

IPC: H01L21/00 ,  H01L27/00 ,  H01L29/00 ,  G02F1/1368 ,  H01L27/12 ,  H01L21/321 ,  G02F1/1362 ,  H01L27/32 ,  H01L29/66 ,  H01L29/78

Abstract: A thin-film transistor (TFT) array substrate is provided. The TFT array substrate includes a base substrate, a semiconductor layer disposed on the base substrate, an insulating layer disposed on the semiconductor layer, and a gate electrode disposed on the insulating layer. A top surface of a portion of the insulating layer overlapping the semiconductor layer in a plan view of the base substrate and a top surface of the gate electrode are placed on the same level.

公开(公告)号：US10438976B2

公开(公告)日：2019-10-08

申请号：US16243702

申请日：2019-01-09

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： Hyun Jin Cho ,  Joon-Hwa Bae ,  Byoung Kwon Choo ,  Byung Hoon Kang ,  Kwang Suk Kim ,  Woo Jin Cho ,  Jun Hyuk Cheon

IPC: H01L27/12 ,  H01L21/3105 ,  G09G3/3233 ,  C09G1/02 ,  B24B31/00 ,  H01L27/32 ,  H01L21/02 ,  H01L29/786 ,  H01L21/66

Abstract: A method for manufacturing a display device includes forming a first gate metal wire on a substrate, forming a first insulation layer that covers the first gate metal wire, forming a second gate metal wire on the first insulation layer, forming a second main insulation layer that covers the second gate metal wire, forming a second auxiliary insulation layer on the second main insulation layer, forming an exposed portion of an upper surface of the second main insulation layer by polishing the second auxiliary insulation layer, and forming a first data metal wire on the second main insulation layer and the second auxiliary insulation layer.

公开(公告)号：US10424762B2

公开(公告)日：2019-09-24

申请号：US16155413

申请日：2018-10-09

Applicant: Samsung Display Co., Ltd.

Inventor： Byung Hoon Kang ,  Seung Jun Moon ,  Hee Kyun Shin ,  Min-Woo Lee ,  Woo Jin Cho

IPC: H01L51/56 ,  H01L51/52 ,  H01L51/00

Abstract: A method for manufacturing a transparent display device includes: providing a transparent flexible substrate on a support substrate; forming a display unit on a front side of the transparent flexible substrate; separating the transparent flexible substrate from the support substrate; and cleaning a rear side of the transparent flexible substrate with plasma.

公开(公告)号：US10199405B2

公开(公告)日：2019-02-05

申请号：US15671638

申请日：2017-08-08

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： Joon-Hwa Bae ,  Byoung Kwon Choo ,  Byung Hoon Kang ,  Woo Jin Cho ,  Hyun Jin Cho ,  Jun Hyuk Cheon ,  Jee-Hyun Lee

IPC: H01L27/12 ,  H01L21/02 ,  H01L29/786 ,  H01L21/306 ,  H01L21/3105 ,  H01L21/321 ,  H01L29/66 ,  H01L21/768

Abstract: A method of manufacturing a transistor display panel and a transistor display panel, the method including forming a polycrystalline silicon layer on a substrate; forming an active layer by patterning the polycrystalline silicon layer; forming a first insulating layer covering the substrate and the active layer; exposing the active layer by polishing the first insulating layer using a polishing apparatus; and forming a second insulating layer that contacts the first insulating layer and the active layer, wherein exposing the active layer by polishing the first insulating layer includes coating a first slurry on a surface of the first insulating layer, the first slurry reducing a polishing rate of the active layer.