摘要:
An instruction decoder identifies, for each instruction, an operational block involved in the execution of the instruction and an associated heat release coefficient. The instruction decoder stores identified information in a heat release coefficient profile. An instruction scheduler schedules the instructions in accordance with the dependence of the instructions on data. A heat release frequency adder cumulatively adds the heat release coefficient to the heat release frequency of the operational block held in the operational block heat release frequency register as the execution of the scheduled instructions proceeds. A heat release frequency subtractor subtracts from the heat release frequency of the operational blocks in the operational block heat release frequency register in accordance with heat discharge that occurs with time. A hot spot detector detects an operational block with its heat release frequency, held in the operational block heat release frequency register, exceeding a predetermined threshold value as a hot spot. The instruction scheduler delays the execution of the instruction involving for its execution the operational block identified as a hot spot.
摘要:
An integrated circuit die is disclosed including a temperature detection circuit and a memory configured to store calibration data. The temperature detection circuit is operatively coupled to the memory, and receives an input signal. The temperature detection circuit is configured to produce an output signal dependent upon the input signal and indicative of whether a temperature of the integrated circuit die is greater than a selected temperature. During a normal operating mode of the integrated circuit die the input signal comprises the calibration data. A system and methods for calibrating the temperature detection circuit are also described.
摘要:
A temperature sensor measures a temperature of a certain location inside a processor. An overall heat amount measurement unit measures the overall amount of heat of the processor. A temperature estimation unit estimates the temperatures of a plurality of hot spots occurring in the processor based on the temperature of the certain location detected by the temperature sensor, and determines the maximum temperature of the processor. The temperature estimation unit switches between maximum load temperature estimation coefficients and individual load temperature estimation coefficients stored in a storing unit for reference, depending on the overall amount of heat of the processor, and applies them to a temperature estimation function(s) for converting the sensor temperature into the temperatures of the hot spots. An operating frequency control unit exercises control for lowering the operating frequency of the processor when the maximum temperature of the processor estimated by the temperature estimation unit exceeds a predetermined limit temperature.
摘要:
A temperature sensor measures a temperature of a certain location inside a processor. An overall heat amount measurement unit measures the overall amount of heat of the processor. A temperature estimation unit estimates the temperatures of a plurality of hot spots occurring in the processor based on the temperature of the certain location detected by the temperature sensor, and determines the maximum temperature of the processor. The temperature estimation unit switches between maximum load temperature estimation coefficients and individual load temperature estimation coefficients stored in a storing unit for reference, depending on the overall amount of heat of the processor, and applies them to a temperature estimation function(s) for converting the sensor temperature into the temperatures of the hot spots. An operating frequency control unit exercises control for lowering the operating frequency of the processor when the maximum temperature of the processor estimated by the temperature estimation unit exceeds a predetermined limit temperature.
摘要:
A heat generation amount estimation unit acquires the number of sub processors currently in operation, acquires the current operating frequency, and estimates the amount of heat generation after a period Δt. A temperature control unit estimates the temperature after the period Δt based on the current temperature input from a temperature sensor and the amount of heat generation estimated, and compares it with a predetermined threshold temperature. If the predetermined threshold temperature is reached, the temperature control unit acquires the number of sub processors available in parallel after the period Δt from a task management unit, and consults a performance table to determine which operation point to shift to. A sub processor control unit and a frequency control unit switch to the number of sub processors in operation and the operating frequency accordingly. The performance table lists possible operation points in order of performance.
摘要:
An integrated circuit die is disclosed including a temperature detection circuit and a memory configured to store calibration data. The temperature detection circuit is operatively coupled to the memory, and receives an input signal. The temperature detection circuit is configured to produce an output signal dependent upon the input signal and indicative of whether a temperature of the integrated circuit die is greater than a selected temperature. During a normal operating mode of the integrated circuit die the input signal comprises the calibration data. A system and methods for calibrating the temperature detection circuit are also described.
摘要:
A method of presetting is provided, wherein a plurality of command signals associated with a plurality of apparatuses, a plurality of manufacturers, a plurality of format systems and a plurality of control operations are stored in a memory in advance. A detecting circuit is provided for sequentially transmitting predetermined command signals (e.g., a power on command) to an apparatus to be controlled in accordance with the operation in the preset mode to detect the operational mode of the apparatus to be controlled. As a result, the operation of the apparatus to be controlled can be automatically detected, and the type, the manufacturer and the format of the of the apparatus can be identified from the command signal transmitted.
摘要:
A remote controller that has preset therein control signals of various formats/code systems in correspondence with different kinds of electronic equipment and of different manufacturers detects the control signal from another remote controller typically used with the electronic equipment, compares it with the preset data, selects a predetermined signal from the preset data and stores it in a memory for use in controlling the electronic equipment. Identifier codes may also be stored in the memory to save memory capacity. With only one input operation, all control signals in the same category, such as channel codes for a television, may be learned and stored in the memory in correspondence with the respective keys. Provision is made to determine whether the input control signal is in the form of a toggle code, thereby executing the learn function for control signals that include the toggle code.
摘要:
An electromotive cooling head includes a substrate, an N-pole magnet, and an S-pole magnet, and kept in intimate contact with the backside of the semiconductor integrated circuit so as to cover it. The substrate has a fluid channel having a micro-channel structure, through which a conductive fluid flows. An anode and a cathode are disposed to sandwich the fluid channel. The conductive fluid interacts with a magnetic field to thereby induce an electromotive force between the anode and the cathode. A circuit includes, on its backside, a power supply voltage terminal and a ground terminal, and is driven by the electromotive force induced in the electromotive cooling head.
摘要:
A design structure for a integrated circuit interfacing system may be embodied in a machine readable medium for designing, manufacturing or testing a integrated circuit. In one embodiment, the design structure specifies an integrated circuit that includes multiple interfaces. The design structure may specify that each of the interfaces couples to a respective set of registers or storage elements on the integrated circuit. The design structure may also specify a bridge circuit on the integrated circuit that switchably couples the two interfaces together such that one interface may communicate with the registers that associate with that interface as well as the registers that associate with the other interface.