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公开(公告)号:US10235075B2
公开(公告)日:2019-03-19
申请号:US15985718
申请日:2018-05-22
Applicant: Silicon Motion Inc.
Inventor: Tsung-Chieh Yang , Chun-Chieh Kuo , Ching-Hui Lin , Yang-Chih Shen
Abstract: A flash memory controller for controlling a flash memory module includes a communication interface for receiving a first data and a second data; and a processing circuit for dynamically controlling a data writing mode of the flash memory module according to an amount of stored data in the flash memory module. If the amount of stored data in the flash memory module is less than a first threshold when the communication interface receives the first data, the processing circuit controls the flash memory module so that the first data is written into the first data block under an one-bit-per-cell mode.
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公开(公告)号:US10007460B2
公开(公告)日:2018-06-26
申请号:US15643501
申请日:2017-07-07
Applicant: Silicon Motion Inc.
Inventor: Tsung-Chieh Yang , Chun-Chieh Kuo , Ching-Hui Lin , Yang-Chih Shen
CPC classification number: G06F3/0634 , G06F3/0604 , G06F3/064 , G06F3/0679 , G06F12/0246 , G06F2212/7201 , G06F2212/7206 , G11C11/5628 , G11C11/5642 , Y02D10/13
Abstract: A flash memory controller for controlling a flash memory module includes a communication interface for receiving a first data and a second data; and a processing circuit for dynamically controlling a data writing mode of the flash memory module according to an amount of stored data in the flash memory module. If the amount of stored data in the flash memory module is less than a first threshold when the communication interface receives the first data, the processing circuit controls the flash memory module so that the first data is written into the first data block under an one-bit-per-cell mode. If the amount of stored data in the flash memory module is greater than the first threshold when the communication interface receives the second data, the processing circuit controls the flash memory module so that the second data is written into the second data block under a two-bit-per-cell mode.
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公开(公告)号:US09733857B2
公开(公告)日:2017-08-15
申请号:US15235128
申请日:2016-08-12
Applicant: Silicon Motion Inc.
Inventor: Tsung-Chieh Yang , Chun-Chieh Kuo , Ching-Hui Lin , Yang-Chih Shen
CPC classification number: G06F3/0634 , G06F3/0604 , G06F3/064 , G06F3/0679 , G06F12/0246 , G06F2212/7201 , G06F2212/7206 , G11C11/5628 , G11C11/5642 , Y02D10/13
Abstract: A flash memory controller for controlling a flash memory module includes a communication interface for receiving a first data and a second data; and a processing circuit for dynamically controlling a data writing mode of the flash memory module according to an amount of stored data in the flash memory module. If the amount of stored data in the flash memory module is less than a first threshold when the communication interface receives the first data, the processing circuit controls the flash memory module so that the first data is written into the first data block under an one-bit-per-cell mode. If the amount of stored data in the flash memory module is greater than the first threshold when the communication interface receives the second data, the processing circuit controls the flash memory module so that the second data is written into the second data block under a two-bit-per-cell mode.
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公开(公告)号:US20160351255A1
公开(公告)日:2016-12-01
申请号:US15235128
申请日:2016-08-12
Applicant: Silicon Motion Inc.
Inventor: Tsung-Chieh Yang , Chun-Chieh Kuo , Ching-Hui Lin , Yang-Chih Shen
IPC: G11C11/56
CPC classification number: G06F3/0634 , G06F3/0604 , G06F3/064 , G06F3/0679 , G06F12/0246 , G06F2212/7201 , G06F2212/7206 , G11C11/5628 , G11C11/5642 , Y02D10/13
Abstract: A flash memory controller for controlling a flash memory module includes a communication interface for receiving a first data and a second data; and a processing circuit for dynamically controlling a data writing mode of the flash memory module according to an amount of stored data in the flash memory module. If the amount of stored data in the flash memory module is less than a first threshold when the communication interface receives the first data, the processing circuit controls the flash memory module so that the first data is written into the first data block under an one-bit-per-cell mode. If the amount of stored data in the flash memory module is greater than the first threshold when the communication interface receives the second data, the processing circuit controls the flash memory module so that the second data is written into the second data block under a two-bit-per-cell mode.
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公开(公告)号:US20160110133A1
公开(公告)日:2016-04-21
申请号:US14983566
申请日:2015-12-30
Applicant: Silicon Motion Inc.
Inventor: Tsung-Chieh Yang , Chun-Chieh Kuo , Ching-Hui Lin , Yang-Chih Shen
IPC: G06F3/06
CPC classification number: G06F3/0634 , G06F3/0604 , G06F3/064 , G06F3/0679 , G06F12/0246 , G06F2212/7201 , G06F2212/7206 , G11C11/5628 , G11C11/5642 , Y02D10/13
Abstract: A flash memory controller for controlling a flash memory module includes a communication interface for receiving a first data and a second data; and a processing circuit for dynamically controlling a data writing mode of the flash memory module according to an amount of stored data in the flash memory module. If the amount of stored data in the flash memory module is less than a first threshold when the communication interface receives the first data, the processing circuit controls the flash memory module so that the first data is written into the first data block under an one-bit-per-cell mode. If the amount of stored data in the flash memory module is greater than the first threshold when the communication interface receives the second data, the processing circuit controls the flash memory module so that the second data is written into the second data block under a two-bit-per-cell mode.
Abstract translation: 一种用于控制闪速存储器模块的闪存控制器包括用于接收第一数据和第二数据的通信接口; 以及处理电路,用于根据闪速存储器模块中存储的数据量来动态地控制闪存模块的数据写入模式。 如果在通信接口接收到第一数据时闪存模块中存储的数据量小于第一阈值,则处理电路控制闪存模块,使得第一数据被写入第一数据块, 每单元位数模式。 如果在通信接口接收到第二数据时闪存模块中存储的数据量大于第一阈值,则处理电路控制闪存模块,使得第二数据被写入第二数据块, 每单元位数模式。
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公开(公告)号:US12236115B2
公开(公告)日:2025-02-25
申请号:US18412635
申请日:2024-01-15
Applicant: Silicon Motion, Inc.
Inventor: Tsung-Chieh Yang , Chun-Chieh Kuo , Ching-Hui Lin , Yang-Chih Shen
Abstract: A flash memory controller for controlling a flash memory module includes a communication interface for receiving a first data and a second data; and a processing circuit for dynamically controlling a data writing mode of the flash memory module according to an amount of stored data in the flash memory module. If the amount of stored data in the flash memory module is less than a first threshold when the communication interface receives the first data, the processing circuit controls the flash memory module so that the first data is written into the first data block under an one-bit-per-cell mode. If the amount of stored data in the flash memory module is greater than the first threshold when the communication interface receives the second data, the processing circuit controls the flash memory module so that the second data is written into the second data block under a two-bit-per-cell mode.
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27.
公开(公告)号:US12135889B2
公开(公告)日:2024-11-05
申请号:US18215185
申请日:2023-06-28
Applicant: Silicon Motion, Inc.
Inventor: Ching-Hui Lin
Abstract: The present invention provides a control method of the flash memory controller. In the control method, after receiving a deallocate command from a host device, the flash memory controller will update a valid page count table, a detailed valid page count table and/or a zone valid page count table according to deallocate command, for the flash memory controller to efficiently and quickly determine if any one of the zones does not have any valid data, so that the flash memory controller can recommend the host device to send a reset command to reset the zone.
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28.
公开(公告)号:US11748011B2
公开(公告)日:2023-09-05
申请号:US17671602
申请日:2022-02-15
Applicant: Silicon Motion, Inc.
Inventor: Ching-Hui Lin
IPC: G06F12/00 , G06F3/06 , G06F12/02 , G06F12/1009
CPC classification number: G06F3/064 , G06F3/0604 , G06F3/0631 , G06F3/0656 , G06F3/0679 , G06F12/0238 , G06F12/1009 , G06F2212/7201
Abstract: The present invention provides a control method of the flash memory controller. In the control method, after receiving a deallocate command from a host device, the flash memory controller will update a valid page count table, a detailed valid page count table and/or a zone valid page count table according to deallocate command, for the flash memory controller to efficiently and quickly determine if any one of the zones does not have any valid data, so that the flash memory controller can recommend the host device to send a reset command to reset the zone.
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29.
公开(公告)号:US20230153002A1
公开(公告)日:2023-05-18
申请号:US18098129
申请日:2023-01-18
Applicant: Silicon Motion, Inc.
Inventor: Ching-Hui Lin
IPC: G06F3/06
CPC classification number: G06F3/064 , G06F3/0605 , G06F3/0652 , G06F3/0659 , G06F3/0679
Abstract: The present invention provides a control method of a flash memory controller, wherein the flash memory controller is configured to access a flash memory module, and the control method includes the steps of: receiving a settling command from a host device to configure a portion space of the flash memory module as a zoned namespace; receiving a write command from the host device to write data corresponding a first zone into a plurality of blocks of the flash memory module, wherein an access mode chose by the flash memory controller is determined based on a size of each zone and a size of each block.
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30.
公开(公告)号:US20220318133A1
公开(公告)日:2022-10-06
申请号:US17581998
申请日:2022-01-24
Applicant: Silicon Motion, Inc.
Inventor: Ken-Fu Hsu , Ching-Hui Lin
IPC: G06F12/02 , G06F12/0882 , G06F3/06
Abstract: The present invention provides a control method of the flash memory controller. In the control method, by establishing a valid page count table, a detailed valid page count table and/or a zone valid page count table according to deallocate command from the host device, the flash memory controller can efficiently and quickly determine if any one of the zones does not have any valid data, so that the flash memory controller can recommend the host device to send a reset command to reset the zone. In addition, after receiving the reset command from the host device, the flash memory controller can use a garbage collection operation or directly put the blocks corresponding to the erased zone into a spare block pool, for the further use.
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