公开(公告)号：US06401224B1

公开(公告)日：2002-06-04

申请号：US09261100

申请日：1999-03-02

申请人： Sabine Schöniger ,  Peter Schrögmeier ,  Thomas Hein ,  Stefan Dietrich

发明人： Sabine Schöniger ,  Peter Schrögmeier ,  Thomas Hein ,  Stefan Dietrich

IPC分类号： G01R3128

CPC分类号： G01R31/3185

摘要： A test method suitable for testing at least one integrated circuit which, on a main area, has contact areas that serve to transfer signals during a first operating mode of the circuit. Only some of the contact areas are contact-connected to test contacts of a test apparatus and the circuit is put into a second operating mode in which the signals which are transferred via at least one of the non-contact-connected contact areas in the first operating mode are transferred via at least one of the contact-connected contact areas.

摘要翻译： 一种适用于测试至少一个集成电路的测试方法，该集成电路在主区域具有用于在电路的第一操作模式期间传送信号的接触区域。 只有一些接触区域接触连接到测试装置的测试触点，并且电路进入第二操作模式，其中通过第一操作模式中的至少一个非接触连接的接触区域传送的信号 操作模式通过至少一个接触连接的接触区域传送。

公开(公告)号：US06188642B1

公开(公告)日：2001-02-13

申请号：US09348736

申请日：1999-07-06

申请人： Sabine Schöniger ,  Peter Schrögmeier ,  Thomas Hein ,  Stefan Dietrich ,  Thilo Marx

发明人： Sabine Schöniger ,  Peter Schrögmeier ,  Thomas Hein ,  Stefan Dietrich ,  Thilo Marx

IPC分类号： G11C800

CPC分类号： G11C8/00

摘要： The integrated memory has a column decoder for decoding column addresses and for addressing corresponding bit lines. The memory also has a first column address bus, which is used to transfer first column addresses to the column decoder, and a second column address bus, which is used to transfer second column addresses to the column decoder. The column decoder in each case addresses bit lines which correspond to the first and second column addresses supplied to it.

摘要翻译： 集成存储器具有用于解码列地址并用于寻址对应位线的列解码器。 存储器还具有第一列地址总线，其用于将第一列地址传送到列解码器，以及第二列地址总线，其用于将第二列地址传送到列解码器。 列解码器在每种情况下都对应于提供给它的第一列地址和第二列地址的位线。

公开(公告)号：US07058840B2

公开(公告)日：2006-06-06

申请号：US10143600

申请日：2002-05-10

申请人： Thilo Marx ,  Peter Schrögmeier

发明人： Thilo Marx ,  Peter Schrögmeier

IPC分类号： G06F1/04

CPC分类号： G06F5/06 ,  H03K5/135 ,  H04L7/0008

摘要： An apparatus for generating a second signal having a clock based on a second clock from a first signal with a first clock comprises first and second means for sampling the first signal to determine whether the first signal has a predetermined logic state, wherein first means samples the first signal with the second clock, and second means samples the first signal with a clock phase shifted to the second clock. Means for generating the second signal generates the second signal based on the second clock if it has been determined by at least one means for sampling that the first signal has the predetermined state. Especially for time critical applications, such as a DDR-RAM, a valuable latency saving is provided by the present invention.

公开(公告)号：US07031421B2

公开(公告)日：2006-04-18

申请号：US10135686

申请日：2002-04-30

申请人： Thilo Marx ,  Peter Schrögmeier

发明人： Thilo Marx ,  Peter Schrögmeier

IPC分类号： H03D3/24 ,  H04L7/00

CPC分类号： G11C7/1087 ,  G11C7/1078 ,  G11C7/222 ,  G11C11/4072 ,  G11C19/00

摘要： A Method for initializing an asynchronous latch chain is described, wherein data are taken over through a latch stage at the beginning of the latch chain upon a request signal, the method comprising starting of a clock creation means, like for example a DLL (DLL=delay locket loop), for creating an internal clock on the basis of an external clock, resetting the asynchronous latch chain and applying a start signal to a request signal generation circuit whereupon the creation of a first request signal is enabled on the basis of the internal clock after the clock creation means is settled and after the asynchronous latch chain is reset.

摘要翻译： 描述了一种用于初始化异步锁存器链的方法，其中数据通过在锁存链的开始处的请求信号上的锁存级占用，该方法包括启动时钟创建装置，例如DLL（DLL = 延迟锁定环），用于基于外部时钟创建内部时钟，复位异步锁存链，并将起始信号施加到请求信号生成电路，由此基于内部信号启用第一请求信号的创建 时钟创建装置之后的时钟被置位并且在异步锁存链被复位之后。

公开(公告)号：US06687669B1

公开(公告)日：2004-02-03

申请号：US09214910

申请日：1999-11-03

申请人： Peter Schrögmeier ,  Tim Haulick ,  Klaus Linhard

发明人： Peter Schrögmeier ,  Tim Haulick ,  Klaus Linhard

IPC分类号： G10L2102

CPC分类号： G10L21/0208 ,  G10L21/0264

摘要： In a method for reducing interferences in a voice signal, a noise reduction method is applied to the voice signal, and spectral psychoacoustic masking is taken into account. A spectral masking curve is determined both for the input signal and the output signal of the noise reduction method. By comparing the signal portions exceeding the respective masking curve, newly-audible portions are detected in the form of interference in the output signal and subsequently damped selectively.

摘要翻译： 在减少语音信号干扰的方法中，将噪声降低方法应用于语音信号，并考虑频谱心理声学掩蔽。 确定噪声降低方法的输入信号和输出信号的频谱掩蔽曲线。 通过比较超过相应屏蔽曲线的信号部分，以可能的形式在输出信号中检测新的可听见的部分，然后选择性地衰减。