Method and apparatus for performing fixed blocksize compression for texture mapping
    21.
    发明授权
    Method and apparatus for performing fixed blocksize compression for texture mapping 有权
    用于对纹理映射执行固定块化压缩的方法和装置

    公开(公告)号:US07171051B1

    公开(公告)日:2007-01-30

    申请号:US10464618

    申请日:2003-06-17

    IPC分类号: G06K9/36 G06K9/00 G06K9/46

    CPC分类号: G06T9/00 G06T15/04

    摘要: Method and apparatus for providing texture and/or alpha compression. In one embodiment, the present invention incorporates stored palettes, e.g., a luminance palette and a chrominance palette such that, compressed texture data pertaining to a fixed blocksize is decoded and applied to the stored palettes to extract the texel data. In a second embodiment, the present method uses a plane to estimate the alpha value at each of the texels, and a three-bit correction factor to adjust the estimate to produce a final alpha value.

    摘要翻译: 用于提供纹理和/或α压缩的方法和装置。 在一个实施例中,本发明包括存储的调色板,例如亮度调色板和色度调色板,使得与固定块大小相关的压缩纹理数据被解码并应用于存储的调色板以提取纹素数据。 在第二实施例中,本方法使用平面来估计每个纹素的α值,以及用于调整估计以产生最终α值的三位校正因子。

    Method for providing extended precision in SIMD vector arithmetic operations
    22.
    发明授权
    Method for providing extended precision in SIMD vector arithmetic operations 有权
    在SIMD向量算术运算中提供扩展精度的方法

    公开(公告)号:US07159100B2

    公开(公告)日:2007-01-02

    申请号:US09223046

    申请日:1998-12-30

    IPC分类号: G06F15/00

    摘要: The present invention provides extended precision in SIMD arithmetic operations in a processor having a register file and an accumulator. A first set of data elements and a second set of data elements are loaded into a first vector register and a second vector register, respectively. Each data element comprises N bits. Next, an arithmetic instruction is fetched from memory. The arithmetic instruction is decoded. Then, a first vector register and a second vector register are read from the register file. The present invention then executes the arithmetic instruction on corresponding data elements in the first and second vector registers. The result of the execution is then written into the accumulator. Then, each element in the accumulator is transformed into an N-bit width element and stored into the memory.

    摘要翻译: 本发明在具有寄存器文件和累加器的处理器中提供SIMD算术运算的扩展精度。 第一组数据元素和第二组数据元素分别被加载到第一向量寄存器和第二向量寄存器中。 每个数据元素包括N位。 接下来,从存储器中取出算术指令。 算术指令被解码。 然后,从寄存器文件读取第一向量寄存器和第二向量寄存器。 然后,本发明对第一和第二向量寄存器中的相应数据元素执行算术指令。 然后将执行结果写入累加器。 然后,累加器中的每个元素被变换成N位元素并存储到存储器中。

    System and method for reserving and managing memory spaces in a memory resource
    23.
    发明授权
    System and method for reserving and managing memory spaces in a memory resource 有权
    用于在内存资源中预留和管理内存空间的系统和方法

    公开(公告)号:US06950107B1

    公开(公告)日:2005-09-27

    申请号:US10726301

    申请日:2003-12-02

    IPC分类号: G06T1/60 G06F12/02

    CPC分类号: G06T1/60

    摘要: System and method for reserving a memory space for multithreaded processing is described. Memory space within a memory resource is allocated responsive to thread type. Examples of thread types for graphics processing include primitive, vertex and fragment types. Memory space allocated may be of a predetermined size for a thread type. Memory locations within a first memory space may be interleaved with memory locations within a second memory space.

    摘要翻译: 描述用于预留用于多线程处理的存储空间的系统和方法。 响应于线程类型分配内存资源内的内存空间。 用于图形处理的线程类型的示例包括原始,顶点和片段类型。 分配的内存空间可以是线程类型的预定大小。 第一存储器空间内的存储器位置可以与第二存储器空间内的存储器位置交错。

    Integrated tessellator in a graphics processing unit
    24.
    发明授权
    Integrated tessellator in a graphics processing unit 有权
    在图形处理单元中集成了细分器

    公开(公告)号:US06906716B2

    公开(公告)日:2005-06-14

    申请号:US10418364

    申请日:2003-04-17

    IPC分类号: G06T15/00 G06T17/20

    摘要: An integrated graphics pipeline system is provided for graphics processing. Such system includes a tessellation module that is positioned on a single semiconductor platform for receiving data for tessellation purposes. Tessellation refers to the process of decomposing either a complex surface such as a sphere or surface patch into simpler primitives such as triangles or quadrilaterals, or a triangle into multiple smaller triangles. Also included on the single semiconductor platform is a transform module adapted to transform the tessellated data from a first space to a second space. Coupled to the transform module is a lighting module which is positioned on the single semiconductor platform for performing lighting operations on the data received from the transform module. Also included is a rasterizer coupled to the lighting module and positioned on the single semiconductor platform for rendering the data received from the lighting module.

    摘要翻译: 提供集成图形管线系统用于图形处理。 这种系统包括一个镶嵌模块,该模块位于单个半导体平台上,用于接收用于镶嵌目的的数据。 细分是指将诸如球体或表面斑块的复杂表面分解成更简单的图元(如三角形或四边形)或三角形分解为多个较小三角形的过程。 还包括在单个半导体平台上的是一种变换模块,其适用于将镶嵌数据从第一空间转换为第二空间。 耦合到变换模块的是照明模块,其位于单个半导体平台上,用于对从变换模块接收的数据进行照明操作。 还包括耦合到照明模块并位于单个半导体平台上的光栅化器,用于渲染从照明模块接收的数据。

    Displaced subdivision surface representation
    26.
    发明授权
    Displaced subdivision surface representation 有权
    位移细分表面表示

    公开(公告)号:US06738062B1

    公开(公告)日:2004-05-18

    申请号:US09839422

    申请日:2001-04-20

    申请人: Henry P. Moreton

    发明人: Henry P. Moreton

    IPC分类号: G06T1720

    CPC分类号: G06T17/20

    摘要: A representation is provided for displacement mapping. Included are a coarse first mesh, and a fine second mesh with a topology substantially similar to a topology of the first mesh. The second mesh includes a plurality of scalar values which each represent an offset between various points on the first mesh and the second mesh.

    摘要翻译: 提供了一种用于位移映射的表示。 包括粗糙的第一网格和具有与第一网格的拓扑基本相似的拓扑的精细的第二网格。 第二网格包括多个标量值,每个标量值表示第一网格上的各个点与第二网格之间的偏移。

    Programmable pixel shading architecture
    27.
    发明授权
    Programmable pixel shading architecture 有权
    可编程像素着色架构

    公开(公告)号:US06724394B1

    公开(公告)日:2004-04-20

    申请号:US09885242

    申请日:2001-06-19

    IPC分类号: G06T1540

    摘要: A system and associated method are provided for processing pixel data in a graphics pipeline. Included is a triangle module coupled to a rasterizer for calculating a plurality of equations using pixel data received from the rasterizer. Also provided is a shader core module coupled to the rasterizer for receiving the pixel data therefrom. The shader core module is further coupled to the triangle module for receiving the equations therefrom. The shader core module functions to execute floating point calculations and generating texture coordinates using the pixel data. Coupled to the shader core module is a texture module. The texture module is capable of looking up texture values using the texture coordinates. Associated therewith is a shader back end module coupled to the texture module and the triangle module. The shader back end module is capable of converting the texture values to an appropriate floating point representation and generating color values using the equations. Still yet, a combiner module is coupled to the shader core module and the shader back end module. Such combiner module combines the color values and the texture values.

    摘要翻译: 提供了一种用于处理图形管线中的像素数据的系统和相关联的方法。 包括耦合到光栅化器的三角形模块,用于使用从光栅化器接收的像素数据来计算多个等式。 还提供了耦合到光栅化器的着色器核心模块,用于从其接收像素数据。 着色器核心模块还耦合到三角形模块以从其接收等式。 着色器核心模块用于执行浮点计算并使用像素数据生成纹理坐标。 结合着色器核心模块是一个纹理模块。 纹理模块能够使用纹理坐标查找纹理值。 与之相关联的是着色后端模块,其耦合到纹理模块和三角形模块。 着色器后端模块能够将纹理值转换为适当的浮点表示,并使用等式生成颜色值。 仍然,组合器模块耦合到着色器核心模块和着色器后端模块。 这样的组合器模块组合了颜色值和纹理值。

    Integrated tessellator in a graphics processing unit
    28.
    发明授权
    Integrated tessellator in a graphics processing unit 有权
    在图形处理单元中集成了细分器

    公开(公告)号:US06597356B1

    公开(公告)日:2003-07-22

    申请号:US09718890

    申请日:2000-11-21

    IPC分类号: G06T1720

    摘要: An integrated graphics pipeline system is provided for graphics processing. Such system includes a tessellation module that is positioned on a single semiconductor platform for receiving data for tessellation purposes. Tessellation refers to the process of decomposing either a complex surface such as a sphere or surface patch into simpler primitives such as triangles or quadrilaterals, or a triangle into multiple smaller triangles. Also included on the single semiconductor platform is a transform module adapted to transform the tessellated data from a first space to a second space. Coupled to the transform module is a lighting module which is positioned on the single semiconductor platform for performing lighting operations on the data received from the transform module. Also included is a rasterizer coupled to the lighting module and positioned on the single semiconductor platform for rendering the data received from the lighting module.

    摘要翻译: 提供集成图形管线系统用于图形处理。 这种系统包括一个镶嵌模块,该模块位于单个半导体平台上,用于接收用于镶嵌目的的数据。 细分是指将诸如球体或表面斑块的复杂表面分解成更简单的图元(如三角形或四边形)或三角形分解为多个较小三角形的过程。 还包括在单个半导体平台上的是一种变换模块,其适用于将镶嵌数据从第一空间转换为第二空间。 耦合到变换模块的是照明模块,其位于单个半导体平台上,用于对从变换模块接收的数据进行照明操作。 还包括耦合到照明模块并位于单个半导体平台上的光栅化器,用于渲染从照明模块接收的数据。

    Circuit to separate and combine color space component data of a video
image
    29.
    发明授权
    Circuit to separate and combine color space component data of a video image 失效
    用于分离和组合视频图像的颜色空间分量数据的电路

    公开(公告)号:US5835729A

    公开(公告)日:1998-11-10

    申请号:US713600

    申请日:1996-09-13

    IPC分类号: H04N9/78 G06F17/00

    CPC分类号: H04N9/78

    摘要: A method and arrangement for separating interleaved luminance and chrominance color space components data in a single data stream with minimum CPU intervention is provided. In the separating circuit, the separating circuit receives as input a series of graphics/video image data composed of interleaved luminance and chrominance color space components at successive clock cycles. The separating circuit directs selected bytes of the graphics/video image data representing the luminance color space component to a first path wherein luminance component data received at two successive clock cycles are combined. Likewise, selected bytes of the graphics/video image data representing the chrominance color space component are directed to a second path wherein chrominance component data received at two successive clock cycles are combined. Then, the combined luminance and chrominance component data are output alternately. Conversely, a method and arrangement for interleaving luminance and chrominance color space components data in stored separately into a single data stream is also provided.

    摘要翻译: 提供了一种用于以最小的CPU干预分离单个数据流中的交错亮度和色度色空间分量数据的方法和装置。 在分离电路中,分离电路在连续的时钟周期作为输入接收由交错亮度和色度色彩空间分量组成的一系列图形/视频图像数据。 分离电路将表示亮度颜色空间分量的图形/视频图像数据的所选字节指向第一路径,其中在两个连续时钟周期接收的亮度分量数据被组合。 类似地,表示色度色彩空间分量的图形/视频图像数据的选定字节被引导到第二路径,其中以两个连续时钟周期接收的色度分量数据被组合。 然后,交替地输出组合的亮度和色度分量数据。 相反地​​,还提供了用于交织存储在单个数据流中的亮度和色度色空间分量数据的方法和装置。

    Method for designing curved shapes for use by a computer
    30.
    发明授权
    Method for designing curved shapes for use by a computer 失效
    用于设计计算机使用的曲面形状的方法

    公开(公告)号:US5636338A

    公开(公告)日:1997-06-03

    申请号:US10800

    申请日:1993-01-29

    申请人: Henry P. Moreton

    发明人: Henry P. Moreton

    IPC分类号: G06T17/30 G06T17/00

    CPC分类号: G06T17/30

    摘要: Methods for forming computer models of curves, networks, or surfaces from user defined specifications of the shape to be modeled. Each specification includes a set of geometric constraints, such as positions, tangents curvatures, and torsions, and may also include discontinuity specifications. In the preferred embodiment, curves are computed so as to locally minimize a scale invariant functional of the geometry of the curve, such as a magnitude of variation in curvature of the curve (MVC) or a magnitude of curvature of the curve (MEC), while satisfying a user defined specification. An improvement on the MVC functional is to add a magnitude of variation in torsion of the curve. An improvement on the MEC functional is to add a magnitude of torsion of the curve. Networks of curves are produced using similar techniques of computing a local minimum of a functional of the geometry of the curves comprising the network, such as a magnitude of variation in curvature of the curves (MVN) or a magnitude of curvature of the curves (MEN), while satisfying a user defined specification. An improvement on these methods is to make the MVN and MEN functionals scale invariant. Another improvement is to make the MVN and MEN functionals torsion dependent. Surfaces are produced using a technique of computing a locally minimized functional of a magnitude of variation in curvature of the surface (MVS), while satisfying a set of surface constraints. An improvement on this method is to make the MVS functional scale invariant.

    摘要翻译: 用于根据要建模的形状的用户定义的规格形成曲线,网络或曲面的计算机模型的方法。 每个规范包括一组几何约束,例如位置,切线曲率和扭转,并且还可以包括不连续性规范。 在优选实施例中,计算曲线以局部最小化曲线几何的尺度不变函数,例如曲线曲率(MVC)的变化幅度或曲线曲率(MEC)的大小, 同时满足用户定义的规范。 MVC功能的改进是增加曲线的扭转变化幅度。 MEC功能的改进是增加曲线的扭曲幅度。 使用类似的技术来生成曲线网络,该技术使用计算包括网络的曲线的几何形状的功能的局部最小值的类似技术,例如曲线曲率的变化幅度(MVN)或曲线的曲率的大小(MEN ),同时满足用户定义的规范。 这些方法的改进是使MVN和MEN功能不变。 另一个改进是使MVN和MEN功能扭转依赖。 使用一种技术来产生表面,该技术在满足一组表面约束的同时计算表面曲率变化幅度的局部最小化函数(MVS)。 这种方法的改进是使MVS功能尺度不变。