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公开(公告)号:US10534736B1
公开(公告)日:2020-01-14
申请号:US16237388
申请日:2018-12-31
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor: Anish Reghunath , Brian Chae , Jay Scott Salinger , Chunheng Luo
IPC: G06F12/02 , G06F13/28 , G06F12/1081 , G06F3/14
Abstract: A system includes a display subsystem. The display subsystem includes a shared buffer having allocated portions, each allocated to one of a plurality of display threads, each display thread associated with a display peripheral. The display subsystem also includes a direct memory access (DMA) engine configured to receive a request from a main processor to deallocate an amount of space from a first allocated portion associated with a first display thread. In response to receiving the request, the DMA engine deallocates the amount of space from the first allocated portion and shifts the allocated portions of at least some of other display threads to maintain contiguity of the allocated portions and concatenate free space at an end of the shared buffer.
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公开(公告)号:US10467765B2
公开(公告)日:2019-11-05
申请号:US15638123
申请日:2017-06-29
Applicant: Texas Instruments Incorporated
Inventor: Hetul Sanghvi , Mihir Narendra Mody , Niraj Nandan , Anish Reghunath , Michael Peter Lachmayr
Abstract: A computer vision system is provided that includes an image generation device configured to generate consecutive two dimensional (2D) images of a scene, and a dense optical flow engine (DOFE) configured to determine a dense optical flow map for pairs of the consecutive 2D images, wherein, for a pair of consecutive 2D images, the DOFE is configured to perform a predictor based correspondence search for each paxel in a current image of the pair of consecutive 2D images, wherein, for an anchor pixel in each paxel, the predictor based correspondence search evaluates a plurality of predictors to select a best matching pixel in a reference image of the pair of consecutive 2D images, and determine optical flow vectors for each pixel in a paxel based on the best matching pixel selected for the anchor pixel of the paxel.
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23.
公开(公告)号:US20190005335A1
公开(公告)日:2019-01-03
申请号:US15638142
申请日:2017-06-29
Applicant: Texas Instruments Incorporated
Inventor: Hetul Sanghvi , Mihir Narendra Mody , Niraj Nandan , Anish Reghunath , Michael Peter Lachmayr
Abstract: A computer vision system is provided that includes an image generation device configured to capture consecutive two dimensional (2D) images of a scene, a first memory configured to store the consecutive 2D images, a second memory configured to store a growing window of consecutive rows of a reference image and a growing window of consecutive rows of a current image, wherein the reference image and the current image are a pair of consecutive 2D images stored in the first memory, a third memory configured to store a sliding window of pixels fetched from the growing window of the reference image, wherein the pixels in the sliding window are stored in tiles, and a dense optical flow engine (DOFE) configured to determine a dense optical flow map for the pair of consecutive 2D images, wherein the DOFE uses the sliding window as a search window for pixel correspondence searches.
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公开(公告)号:US11620757B2
公开(公告)日:2023-04-04
申请号:US17533256
申请日:2021-11-23
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor: Hetul Sanghvi , Mihir Narendra Mody , Niraj Nandan , Anish Reghunath , Michael Peter Lachmayr
Abstract: A computer vision system is provided that includes an image generation device configured to generate consecutive two dimensional (2D) images of a scene, and a dense optical flow engine (DOFE) configured to determine a dense optical flow map for pairs of the consecutive 2D images, wherein, for a pair of consecutive 2D images, the DOFE is configured to perform a predictor based correspondence search for each paxel in a current image of the pair of consecutive 2D images, wherein, for an anchor pixel in each paxel, the predictor based correspondence search evaluates a plurality of predictors to select a best matching pixel in a reference image of the pair of consecutive 2D images, and determine optical flow vectors for each pixel in a paxel based on the best matching pixel selected for the anchor pixel of the paxel.
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公开(公告)号:US20220391338A1
公开(公告)日:2022-12-08
申请号:US17887906
申请日:2022-08-15
Applicant: Texas Instruments Incorporated
Inventor: Anish Reghunath , Brian Chae , Jay Scott Salinger , Chunheng Luo
IPC: G06F13/28 , G06F12/1081 , G06F3/14
Abstract: A system includes a display subsystem. The display subsystem includes a shared buffer having allocated portions, each allocated to one of a plurality of display threads, each display thread associated with a display peripheral. The display subsystem also includes a direct memory access (DMA) engine configured to receive a request from a main processor to deallocate an amount of space from a first allocated portion associated with a first display thread. In response to receiving the request, the DMA engine deallocates the amount of space from the first allocated portion and shifts the allocated portions of at least some of other display threads to maintain contiguity of the allocated portions and concatenate free space at an end of the shared buffer.
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公开(公告)号:US11237991B2
公开(公告)日:2022-02-01
申请号:US16995364
申请日:2020-08-17
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor: Mihir Mody , Niraj Nandan , Hetul Sanghvi , Brian Chae , Rajasekhar Reddy Allu , Jason A. T. Jones , Anthony Lell , Anish Reghunath
Abstract: A processing accelerator includes a shared memory, and a stream accelerator, a memory-to-memory accelerator, and a common DMA controller coupled to the shared memory. The stream accelerator is configured to process a real-time data stream, and to store stream accelerator output data generated by processing the real-time data stream in the shared memory. The memory-to-memory accelerator is configured to retrieve input data from the shared memory, to process the input data, and to store, in the shared memory, memory-to-memory accelerator output data generated by processing the input data. The common DMA controller is configured to retrieve stream accelerator output data from the shared memory and transfer the stream accelerator output data to memory external to the processing accelerator; and to retrieve the memory-to-memory accelerator output data from the shared memory and transfer the memory-to-memory accelerator output data to memory external to the processing accelerator.
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公开(公告)号:US10944950B2
公开(公告)日:2021-03-09
申请号:US15851351
申请日:2017-12-21
Applicant: TEXAS INSTRUMENTS INCORPORATED
Abstract: Systems and methods are provided for transmitting functional safety statistics within a system. A video source produces a video data stream. A functional safety system driver accumulates functional safety statistics from at least one system and writes the functional safety statistics onto an associated system memory. A display sub-system driver writes a frame of the video data stream to the system memory. The display sub-system driver formats the functional safety statistics as video data and appends the functional safety statistics to a portion of the frame of video that is reserved for the functional safety statistics. A display sub-system transmits the frame of the video data stream to a host processor, which extracts the functional safety statistics from the video frame.
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公开(公告)号:US20200210360A1
公开(公告)日:2020-07-02
申请号:US16704820
申请日:2019-12-05
Applicant: Texas Instruments Incorporated
Inventor: Anish Reghunath , Brian Chae , Jay Scott Salinger , Chunheng Luo
IPC: G06F13/28 , G06F3/14 , G06F12/1081
Abstract: A system includes a display subsystem. The display subsystem includes a shared buffer having allocated portions, each allocated to one of a plurality of display threads, each display thread associated with a display peripheral. The display subsystem also includes a direct memory access (DMA) engine configured to receive a request from a main processor to deallocate an amount of space from a first allocated portion associated with a first display thread. In response to receiving the request, the DMA engine deallocates the amount of space from the first allocated portion and shifts the allocated portions of at least some of other display threads to maintain contiguity of the allocated portions and concatenate free space at an end of the shared buffer.
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公开(公告)号:US20190087681A1
公开(公告)日:2019-03-21
申请号:US15707695
申请日:2017-09-18
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor: Anish Reghunath , Hetul Sanghvi , Michael Lachmayr , Mihir Mody
Abstract: Systems and methods for performing Census Transforms that includes an input from an image, with a support window created within the image, and a kernel within the support window. The Census Transform calculations and comparisons are performed within the kernel windows. One disclosed method allows for previously performed comparison to be calculated and compared as an if not equal invert or if equal use pervious comparison hardware design. Alternatively, a new Census Transform is disclosed which always inverts a previously made comparison. This new approach can be demonstrated to be equivalent to, applying the original Census Transform, on a pre-processed input kernel, w here the pre-processing step adds a fractional position index to each pixel within the N×N kernel. The fractional positional index ensures that no two pixels are equal to one another, and thereby makes the Original Census algorithm on pre-processed kernel same as the new Census algorithm on original kernel. The hardware design for this new Census Transform kernel allows for an always invert of previous comparison system resulting in reduced hardware and power consumption.
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公开(公告)号:US20190043153A1
公开(公告)日:2019-02-07
申请号:US15668453
申请日:2017-08-03
Applicant: Texas Instruments Incorporated
Inventor: Sunita Nadampalli , Anish Reghunath , Brian Okchon Chae , Jonathan Elliot Bergsagel , Gregory Raymond Shurtz
IPC: G06T1/20 , G06F3/06 , G06F9/54 , H04N21/4143
CPC classification number: G06T1/20 , G06F3/0641 , G06F3/0655 , G06F9/544 , H04N21/41422 , H04N21/4143 , H04N21/42653 , H04N2005/443
Abstract: An integrated circuit includes a display sub-system that has a plurality of image processing resources and control logic. The image processing resources include a plurality of image processing pipelines configured to operate in parallel, overlay logic coupled to receive image data from the plurality of image processing pipelines, and an image output port coupled to an output of the overlay logic with image data outputs configured to couple to one or more display devices. The control logic is dynamically configurable to assign each of the image processing resources to a selected one of a first control port and a second control port. The first control port is configured to be controlled exclusively by a first processor and the second control port is configured to be controlled exclusively by a second processor.
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