公开(公告)号：US11031868B2

公开(公告)日：2021-06-08

申请号：US16586316

申请日：2019-09-27

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Kuang-Yao Cheng ,  Muthusubramanian Venkateswaran ,  Dattatreya Baragur Suryanarayana ,  Preetam Charan Anand Tadeparthy

IPC: H02M3/158 ,  H02M1/00

Abstract: A system includes a load and a switching converter coupled to the load. The switching converter includes at least one switching module and an output inductor coupled to a switch node of each switching module. The switching converter also includes a controller coupled to each switching module, where the controller is configured to adjust a pulse clock rate and a switch on-time for each switching module. The controller comprises a pulse truncation circuit configured to detect a voltage overshoot condition and to truncate an active switch on-time pulse in response to the detected voltage overshoot condition.

公开(公告)号：US10746778B2

公开(公告)日：2020-08-18

申请号：US16425449

申请日：2019-05-29

Applicant: Texas Instruments Incorporated

Inventor： Sudeep Banerji ,  Dattatreya Baragur Suryanarayana ,  Vikram Gakhar ,  Preetam Tadeparthy ,  Vikas Lakhanpal ,  Muthusubramanian Venkateswaran ,  Vishnuvardhan Reddy J

IPC: H02M3/156 ,  G01R31/01 ,  G01R19/00 ,  H02M1/00 ,  G01R1/20 ,  H02M3/158

Abstract: A current detection system includes an inductor and a detection circuit coupled across the inductor. The inductor is configured to receive an input signal that includes an input current and generate a voltage across the inductor. The current detection circuit includes a sensing network and a transconductance amplifier. The sensing network includes a capacitor and is configured to monitor a voltage across the inductor. The transconductance amplifier is configured to receive a differential voltage indicative of a voltage drop across the capacitor and output a differential output current proportional to the differential voltage.

公开(公告)号：US10459030B2

公开(公告)日：2019-10-29

申请号：US15788292

申请日：2017-10-19

Applicant: Texas Instruments Incorporated

Inventor： Kushal D Murthy ,  Manish Parmar ,  Preetam Tadeparthy ,  Muthusubramanian Venkateswaran

IPC: G01R31/00 ,  G01R31/3177 ,  G01R31/28 ,  H03K19/0948 ,  H01L21/66 ,  G01R31/317

Abstract: An integrated circuit (IC) is provided with functional logic having a plurality of internal signal lines and test logic. The test logic has a plurality of inputs coupled to the plurality of internal signal lines and with an output coupled to a first external pin of the integrated circuit. The test logic includes a buffer, and the test logic is configured to selectively couple each of the signals received on the plurality of signal lines either directly or via the buffer to the first external pin of the IC. The test logic is configured to selectively couple a signal received on a second external pin of the IC either directly or via the buffer to the first external pin of the IC in order to calibrate the buffer.

公开(公告)号：US20190277897A1

公开(公告)日：2019-09-12

申请号：US16425449

申请日：2019-05-29

Applicant: Texas Instruments Incorporated

Inventor： Sudeep Banerji ,  Dattatreya Baragur Suryanarayana ,  Vikram Gakhar ,  Preetam Tadeparthy ,  Vikas Lakhanpal ,  Muthusubramanian Venkateswaran ,  Vishnuvardhan Reddy J

IPC: G01R31/01 ,  H02M3/156

Abstract: A current detection system includes an inductor and a detection circuit coupled across the inductor. The inductor is configured to receive an input signal that includes an input current and generate a voltage across the inductor. The current detection circuit includes a sensing network and a transconductance amplifier. The sensing network includes a capacitor and is configured to monitor a voltage across the inductor. The transconductance amplifier is configured to receive a differential voltage indicative of a voltage drop across the capacitor and output a differential output current proportional to the differential voltage.

公开(公告)号：US10177644B1

公开(公告)日：2019-01-08

申请号：US15729004

申请日：2017-10-10

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Kushal D. Murthy ,  Vikram Gakhar ,  Muthusubramanian Venkateswaran ,  Preetam Tadeparthy

IPC: H02M3/158 ,  H02M1/08 ,  G01R29/02 ,  G01R19/12 ,  H02M1/00

Abstract: A voltage converter includes a high side power transistor coupled to an input voltage node and a low side power transistor coupled to the high side power transistor at a switch node. The switch node is configured to be coupled to an inductor. A slope detector circuit is configured to receive a signal indicative of a current through the inductor. The inductor current is a triangular waveform comprising a ramp-up phase and a ramp-down phase. The slope detector circuit also is configured to generate an output signal encoding when the inductor current is ramping up and when the inductor current is ramping down.

公开(公告)号：US20170234926A1

公开(公告)日：2017-08-17

申请号：US15042132

申请日：2016-02-11

Applicant: Texas Instruments Incorporated

Inventor： Kushal D. Murthy ,  Manish Parmar ,  Preetam Tadeparthy ,  Muthusubramanian Venkateswaran

IPC: G01R31/3177 ,  H01L21/66 ,  H03K19/0948 ,  G01R31/317 ,  G01R31/28

CPC classification number: G01R31/3177 ,  G01R31/2884 ,  G01R31/31723 ,  H01L22/14 ,  H01L22/34 ,  H03K19/0948

Abstract: An integrated circuit (IC) is provided with functional logic having a plurality of internal signal lines and test logic. The test logic has a plurality of inputs coupled to the plurality of internal signal lines and with an output coupled to a first external pin of the integrated circuit. The test logic includes a buffer, and the test logic is configured to selectively couple each of the signals received on the plurality of signal lines either directly or via the buffer to the first external pin of the IC. The test logic may be configured to selectively couple a signal received on a second external pin of the IC either via the buffer to the first external pin of the IC in order to calibrate the buffer.