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公开(公告)号：US11973423B2
公开(公告)日：2024-04-30
申请号：US17238979
申请日：2021-04-23
Applicant: Texas Instruments Incorporated
Inventor： Kuang-Yao Cheng , Muthusubramanian Venkateswaran , Dattatreya Baragur Suryanarayana , Preetam Charan Anand Tadeparthy
CPC classification number: H02M3/158 , H02M1/0061 , H02M1/0016 , H02M1/0067 , H02M1/0077 , H02M3/1586
Abstract: A system includes a load and a switching converter coupled to the load. The switching converter includes at least one switching module and an output inductor coupled to a switch node of each switching module. The switching converter also includes a controller coupled to each switching module, where the controller is configured to adjust a pulse clock rate and a switch on-time for each switching module. The controller comprises a pulse truncation circuit configured to detect a voltage overshoot condition and to truncate an active switch on-time pulse in response to the detected voltage overshoot condition.
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公开(公告)号：US10345353B2
公开(公告)日：2019-07-09
申请号：US15810245
申请日：2017-11-13
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor： Sudeep Banerji , Dattatreya Baragur Suryanarayana , Vikram Gakhar , Preetam Tadeparthy , Vikas Lakhanpal , Muthusubramanian Venkateswaran , Vishnuvardhan Reddy J
Abstract: A current detection system includes an inductor and a detection circuit coupled across the inductor. The inductor is configured to receive an input signal that includes an input current and generate a voltage across the inductor. The current detection circuit includes a sensing network and a transconductance amplifier. The sensing network includes a capacitor and is configured to monitor a voltage across the inductor. The transconductance amplifier is configured to receive a differential voltage indicative of a voltage drop across the capacitor and output a differential output current proportional to the differential voltage.
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公开(公告)号：US10297334B2
公开(公告)日：2019-05-21
申请号：US15597820
申请日：2017-05-17
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor： Anindita Borah , Muthusubramanian Venkateswaran , Kushal D. Murthy , Vikram Gakhar , Preetam Tadeparthy
Abstract: A one-time programmable (OTP) circuit. The OTP circuit includes a non-volatile OTP memory disposed on a first circuit die. The OTP memory includes a floating gate terminal. The OTP circuit also includes a cross-coupled latch disposed on the first circuit die and coupled to the OTP memory and volatile memory input circuitry disposed on the first circuit die and coupled to the cross-coupled latch. The volatile memory input circuitry is configured to receive a test value and write the test value into the cross-coupled latch. The OTP circuit is configured to receive a programming command and store the test value in the OTP memory in response to receipt of the programming command.
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公开(公告)号：US09973204B1
公开(公告)日：2018-05-15
申请号：US15663149
申请日：2017-07-28
Applicant: TEXAS INSTRUMENTS INCORPORATED
CPC classification number: H03M1/808 , H03M1/0602 , H03M1/682 , H03M1/74
Abstract: In some embodiments, a resistor string digital to analog converter (DAC) comprises a first plurality of resistors disposed in a first column. Each of the first plurality of resistors couples to an output of the first column via one of a first plurality of switches. The DAC also comprises a second plurality of resistors disposed in a second column. Each of the second plurality of resistors couples to an output of the second column via one of a second plurality of switches. The second plurality of resistors is configured to couple in series with the first plurality of resistors. A first row selection signal is to control a first switch of the first plurality of switches and a second switch of the second plurality of switches. The first switch corresponds to a first resistor disposed at a top of the first column, and the second switch corresponds to a second resistor disposed at a bottom of the second column.
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公开(公告)号：US11881774B2
公开(公告)日：2024-01-23
申请号：US17200564
申请日：2021-03-12
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor： Bikash Kumar Pradhan , Preetam Charan Anand Tadeparthy , Muthusubramanian Venkateswaran , Venkatesh Wadeyar , Siddaram Mathapathi
CPC classification number: H02M3/158 , H02M1/00 , H02M1/0045
Abstract: A controller includes: a pulse-width modulation (PWM) circuit; a control loop; and a reference voltage controller. The control loop has: a feedback input adapted to be coupled to an output voltage of a power stage; a control loop output coupled to a PWM control input; and an operational amplifier with a first feedback input, a first reference input, and an amplifier output, the first feedback input connected to the feedback input, and the amplifier output coupled to the PWM control input. The reference voltage controller has a reference voltage output coupled to the first reference input, the reference voltage controller configured to adjust a reference voltage provided to the reference voltage output responsive to a dynamic error estimate based on error in the operational amplifier.
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Patent Agency Ranking
公开(公告)号：US10897267B1
公开(公告)日：2021-01-19
申请号：US16731280
申请日：2019-12-31
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor： Naman Bafna , Muthusubramanian Venkateswaran , Rohit Narula
Abstract: A circuit includes a first voltage divider having a set of most significant bit (MSB) outputs each representative of a value of a MSB portion of a digital code. The circuit also includes a second voltage divider having a first upper voltage input configured to couple to a first one of a first pair of outputs of the set of MSB outputs, and a first lower voltage input configured to couple to a second one of the first pair of outputs of the set of MSB outputs. The circuit also includes a third voltage divider having a second upper voltage input configured to couple to a first one of a second pair of outputs of the set of MSB outputs, and a second lower voltage input configured to couple to a second one of the second pair of outputs of the set of MSB outputs.
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公开(公告)号：US10551859B2
公开(公告)日：2020-02-04
申请号：US15596864
申请日：2017-05-16
Applicant: Texas Instruments Incorporated
Inventor： Vikram Gakhar , Preetam Tadeparthy , Dattatreya Baragur Suryanarayana , Muthusubramanian Venkateswaran , Vikas Lakhanpal
IPC: G05F1/575
Abstract: In a described example, a method includes using a power supply, supplying an output voltage that varies in response to a reference voltage; detecting a voltage ramp in an input reference voltage; generating an offset voltage waveform; adding the offset voltage waveform to the input reference voltage to generate a second reference voltage; and using the second reference voltage, operating the power supply to supply the output voltage.
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公开(公告)号：US20170336818A1
公开(公告)日：2017-11-23
申请号：US15596864
申请日：2017-05-16
Applicant: Texas Instruments Incorporated
Inventor： Vikram Gakhar , Preetam Tadeparthy , Dattatreya Baragur Suryanarayana , Muthusubramanian Venkateswaran , Vikas Lakhanpal
IPC: G05F1/575
CPC classification number: G05F1/575
Abstract: In a described example, a method includes using a power supply, supplying an output voltage that varies in response to a reference voltage; detecting a voltage ramp in an input reference voltage; generating an offset voltage waveform; adding the offset voltage waveform to the input reference voltage to generate a second reference voltage; and using the second reference voltage, operating the power supply to supply the output voltage.
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公开(公告)号：US11888393B2
公开(公告)日：2024-01-30
申请号：US17537595
申请日：2021-11-30
Applicant: Texas Instruments Incorporated
Inventor： Muthusubramanian Venkateswaran , Rohit Narula , Preetam Charan Anand Tadeparthy , Matthew John Ascher Schurmann , Rajesh Venugopal
CPC classification number: H02M3/155 , H02M1/08 , H02M1/32 , H02M1/36 , H02M3/1586
Abstract: A multiphase controller includes an integrator enable terminal, a pulse width modulator, an error integrator, an open drain driver, and an integrator enable circuit. The integrator enable terminal is adapted to be coupled to the integrator enable terminal of a different instance of the multiphase controller. The pulse width modulator is configured to modulate a power stage. The error integrator is configured to control the pulse width modulator. The open drain driver is coupled to the integrator enable circuit. The integrator enable circuit is coupled to the pulse width modulator, the error integrator, the open drain driver, and the integrator enable terminal. The integrator enable circuit is configured to activate the open drain driver responsive to generation of a power stage control pulse by the pulse width modulator, and activate the error integrator responsive to a logic low signal at the integrator enable terminal.
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公开(公告)号：US11294411B1
公开(公告)日：2022-04-05
申请号：US16950239
申请日：2020-11-17
Applicant: TEXAS INSTRUMENTS INCORPORATED
Abstract: A power stage controller includes: a multi-phase pulse control circuit; a current sense circuit; a comparator; an error amplifier; and a mode controller. The mode controller includes a mode controller input and a summation circuit. The summation circuit has a first summation circuit input, a second summation circuit input and a summation circuit output, the first summation circuit input is coupled to the error amplifier output, and the summation circuit output is coupled to the first comparator input. The mode controller is configured to: select one of a main controller mode or a secondary controller mode responsive to a mode control voltage at the mode controller input; bypass the summation circuit responsive to selection of the main controller mode; and enable the summation circuit responsive to selection of the secondary controller mode.
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