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    PACKET PROCESSING VLIW ACTION UNIT WITH OR-MULTI-PORTED INSTRUCTION MEMORY
    21.
    发明申请
    PACKET PROCESSING VLIW ACTION UNIT WITH OR-MULTI-PORTED INSTRUCTION MEMORY 有权
    分组处理具有多重指令记忆的VLIW动作单元

    公开(公告)号：US20140241359A1

    公开(公告)日：2014-08-28

    申请号：US14190770

    申请日：2014-02-26

    Applicant: Texas Instruments Incorporated

    Inventor： Patrick W. Bosshart ,  Hun-Seok Kim

    IPC: H04L12/741

    CPC classification number: H04L45/745 ,  H04L45/74 ,  H04L45/7457 ,  H04L49/3063

    Abstract: An embodiment of the invention includes a memory and apparatus for packet processing in a switching network. The memory includes a plurality of words where each word includes a plurality of bits. Each word in the plurality of words is addressed by separate and distinct read address. A logic circuit performs a logical “OR” function on all the bit in all the words addressed by the separate and distinct read addresses and outputs a result.

    Abstract translation: 本发明的实施例包括用于交换网络中的分组处理的存储器和装置。 存储器包括多个单词，其中每个单词包括多个位。 多个单词中的每个单词通过单独和不同的读取地址来寻址。 逻辑电路对由单独和不同读取地址寻址的所有单词中的所有位执行逻辑“或”功能，并输出结果。

    Packet processing match and action pipeline structure with dependency calculation removing false dependencies
    24.
    发明授权
    Packet processing match and action pipeline structure with dependency calculation removing false dependencies 有权

    公开(公告)号：US09906445B2

    公开(公告)日：2018-02-27

    申请号：US14168202

    申请日：2014-01-30

    Applicant: Texas Instruments Incorporated

    Inventor： Patrick W. Bosshart

    IPC: H04L12/741 ,  H04L12/707 ,  H04L12/771

    CPC classification number: H04L45/74 ,  H04L45/24 ,  H04L45/56

    Abstract: An embodiment of the invention includes a plurality of tables in a hardware network for performing packet processing. Each table in the plurality of tables includes a table declaration. The table declaration includes a first set of fields used for input matching and a second set of fields used as inputs for action processing. A first table is selected from the plurality of tables. Successor tables to the first table are selected from the plurality of tables. There is a third set of fields for each successor table of the successor tables. The contents of the third set of fields are output fields where the output fields are modified by the first table when a next table of the first table is the successor table of the first table.

    Structure for Implementing Openflow All Group Buckets Using Egress Flow Table Entries
    26.
    发明申请
    Structure for Implementing Openflow All Group Buckets Using Egress Flow Table Entries 审中-公开
    使用出口流表项实现Openflow所有组桶的结构

    公开(公告)号：US20160330127A1

    公开(公告)日：2016-11-10

    申请号：US15212616

    申请日：2016-07-18

    Applicant: TEXAS INSTRUMENTS INCORPORATED

    Inventor： Hun-Seok Kim ,  Patrick W. Bosshart

    IPC: H04L12/851 ,  H04L12/863 ,  H04L29/06

    CPC classification number: H04L47/2441 ,  H04L47/21 ,  H04L47/622 ,  H04L69/22

    Abstract: An embodiment of the invention includes an Openflow switch. The Openflow switch includes Openflow ALL groups. The Openflow ALL groups include ALL group buckets. During ingress ALL group buckets are represented in ingress as a list of output ports with associated queue ID's and associated copy-counts. Each ALL group bucket is represented in egress by an egress Openflow table entry where the egress Openflow table entry matches a group ID and a bucket ID. An action entry in an ALL group bucket table entry is the set of actions in the Openflow ALL group bucket excluding an output port and queue assignment.

    Abstract translation: 本发明的实施例包括一个开漏开关。 Openflow开关包括Openflow ALL组。 Openflow ALL组包括所有组桶。 在入口期间，所有组桶在入口中表示为具有相关队列ID和关联复制计数的输出端口列表。 每个ALL组桶由出口Openflow表项在出口处表示，其中出口Openflow表项与组ID和桶ID匹配。 ALL组桶表条目中的操作条目是Openflow ALL组桶中的一组操作，不包括输出端口和队列分配。

    Structure for implementing openflow all group buckets using egress flow table entries
    27.
    发明授权
    Structure for implementing openflow all group buckets using egress flow table entries 有权
    使用出口流表项实现所有组桶的开放结构

    公开(公告)号：US09419903B2

    公开(公告)日：2016-08-16

    申请号：US14072985

    申请日：2013-11-06

    Applicant: Texas Instruments Incorporated

    Inventor： Hun-Seok Kim ,  Patrick W. Bosshart

    IPC: G06F11/00 ,  H04L12/819

    CPC classification number: H04L47/2441 ,  H04L47/21 ,  H04L47/622 ,  H04L69/22

    Abstract: An embodiment of the invention includes an Openflow switch. The Openflow switch includes Openflow ALL groups. The Openflow ALL groups include ALL group buckets. During ingress ALL group buckets are represented in ingress as a list of output ports with associated queue ID's and associated copy-counts. Each ALL group bucket is represented in egress by an egress Openflow table entry where the egress Openflow table entry matches a group ID and a bucket ID. An action entry in an ALL group bucket table entry is the set of actions in the Openflow ALL group bucket excluding an output port and queue assignment.

    Abstract translation: 本发明的实施例包括一个开漏开关。 Openflow开关包括Openflow ALL组。 Openflow ALL组包括所有组桶。 在入口期间，所有组桶在入口中表示为具有相关队列ID和关联复制计数的输出端口列表。 每个ALL组桶由出口Openflow表项在出口处表示，其中出口Openflow表项与组ID和桶ID匹配。 ALL组桶表条目中的操作条目是Openflow ALL组桶中的一组操作，不包括输出端口和队列分配。

    STRUCTURE FOR IMPLEMENTING OPENFLOW ALL GROUP BUCKETS USING EGRESS FLOW TABLE ENTRIES
    28.
    发明申请
    STRUCTURE FOR IMPLEMENTING OPENFLOW ALL GROUP BUCKETS USING EGRESS FLOW TABLE ENTRIES 有权
    使用轮胎流量表进行打开所有集体料斗的结构

    公开(公告)号：US20140328180A1

    公开(公告)日：2014-11-06

    申请号：US14072985

    申请日：2013-11-06

    Applicant: Texas Instruments Incorporated

    Inventor： Hun-Seok Kim ,  Patrick W. Bosshart

    IPC: H04L12/819

    CPC classification number: H04L47/2441 ,  H04L47/21 ,  H04L47/622 ,  H04L69/22

    Abstract: An embodiment of the invention includes an Openflow switch. The Openflow switch includes Openflow ALL groups. The Openflow ALL groups include ALL group buckets. During ingress ALL group buckets are represented in ingress as a list of output ports with associated queue ID's and associated copy-counts. Each ALL group bucket is represented in egress by an egress Openflow table entry where the egress Openflow table entry matches a group ID and a bucket ID. An action entry in an ALL group bucket table entry is the set of actions in the Openflow ALL group bucket excluding an output port and queue assignment.

    Abstract translation: 本发明的实施例包括一个开漏开关。 Openflow开关包括Openflow ALL组。 Openflow ALL组包括所有组桶。 在入口期间，所有组桶在入口中表示为具有相关队列ID和关联复制计数的输出端口列表。 每个ALL组桶由出口Openflow表项在出口处表示，其中出口Openflow表项与组ID和桶ID匹配。 ALL组桶表条目中的操作条目是Openflow ALL组桶中的一组操作，不包括输出端口和队列分配。

    TCAM WITH EFFICIENT RANGE SEARCH CAPABILITY
    29.
    发明申请
    TCAM WITH EFFICIENT RANGE SEARCH CAPABILITY 有权
    TCAM具有有效的范围搜索能力

    公开(公告)号：US20140268971A1

    公开(公告)日：2014-09-18

    申请号：US14205780

    申请日：2014-03-12

    Applicant: Texas Instruments Incorporated

    Inventor： Patrick W. Bosshart

    IPC: G11C15/04

    CPC classification number: G11C15/04

    Abstract: An embodiment of the invention includes a ternary content addressable memory (TCAM) that has input search data bits, TCAM words and range search input data bits. Each TCAM word is operable to store a match pattern and provide a match output. The match output indicates a match when the match pattern of the TCAM word matches the TCAM input search data bits. The range search input data bits are separated into groups. Each group has a bit width N where N is the number of range search input data bits. For the match pattern in each group, there is a Boolean function that uses the N range of search input data bits. (2N)/2 TCAM bits are provided for each TCAM word. 2N internal TCAM search lines are operable to search the (2N)/2 TCAM bits. Decoder logic is associated with each group that decodes the N range search input data bits.

    Abstract translation: 本发明的实施例包括具有输入搜索数据位，TCAM字和范围搜索输入数据位的三元内容可寻址存储器（TCAM）。 每个TCAM字可操作地存储匹配模式并提供匹配输出。 匹配输出表示当TCAM字符的匹配模式与TCAM输入搜索数据位匹配时的匹配。 范围搜索输入数据位被分成组。 每组具有位宽N，其中N是范围搜索输入数据位的数量。 对于每个组中的匹配模式，有一个使用N个搜索输入数据位范围的布尔函数。 （2N）/ 2个TCAM位为每个TCAM字提供。 2N内部TCAM搜索行可以搜索（2N）/ 2个TCAM位。 解码器逻辑与解码N个范围搜索输入数据位的每个组相关联。

    PACKET PROCESSING MATCH AND ACTION UNIT WITH STATEFUL ACTIONS
    30.
    发明申请
    PACKET PROCESSING MATCH AND ACTION UNIT WITH STATEFUL ACTIONS 审中-公开
    分组处理配对和动作单元与动作

    公开(公告)号：US20140244966A1

    公开(公告)日：2014-08-28

    申请号：US14193199

    申请日：2014-02-28

    Applicant: Texas Instruments Incorporated

    Inventor： Patrick W. Bosshart ,  Hun-Seok Kim

    IPC: G06F12/10

    CPC classification number: H04L49/90

    Abstract: A packet processing block. The block comprises an input for receiving data in a packet header vector, where the vector comprises data values representing information for a packet. The block also comprises circuitry for performing packet match operations in response to at least a portion of the packet header vector and data stored in a match table and circuitry for performing one or more actions in response to a match detected by the circuitry for performing packet match operations. The one or more actions comprise modifying the data values representing information for a packet. The block also comprises at least one stateful memory comprising stateful memory data values. The one or more actions includes various stateful actions for reading stateful memory, modifying data values representing information for a packet, as a function of the stateful memory data values; and storing modified stateful memory data value back into the stateful memory.

    Abstract translation: 一个数据包处理块。 该块包括用于在分组报头向量中接收数据的输入，其中矢量包括表示分组的信息的数据值。 该块还包括用于响应于分组报头向量的至少一部分和存储在匹配表中的数据执行分组匹配操作的电路和用于响应于由用于执行分组匹配的电路检测到的匹配执行一个或多个动作的电路 操作。 一个或多个动作包括修改表示分组的信息的数据值。 该块还包括至少一个包含状态存储器数据值的有状态存储器。 一个或多个动作包括用于读取状态存储器的各种有状态动作，修改表示数据包的信息的数据值，作为有状态存储器数据值的函数; 并将修改的有状态存储器数据值存储回有状态存储器中。

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