公开(公告)号：US20200019201A1

公开(公告)日：2020-01-16

申请号：US16578361

申请日：2019-09-22

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Yvonne Lin ,  Da-Wen Lin ,  Peter Huang ,  Paul Rousseau ,  Sheng-Jier Yang

IPC: G05F3/16 ,  H01L29/06 ,  H01L27/088 ,  H01L21/8234 ,  G05F1/595 ,  G05F1/46 ,  H01L29/78

Abstract: Some embodiments relate to a device disposed on a semiconductor substrate. The semiconductor substrate includes a base region and a crown structure extending upwardly from the base region. The crown structure is narrower than the base region. A plurality of fins extend upwardly from an upper surface of the crown structure. A gate dielectric material is disposed over upper surfaces and sidewalls of the plurality of the fins. A conductive electrode is disposed along sidewall portions of the gate dielectric material. An uppermost surface of the conductive electrode resides below the upper surfaces of the plurality of fins.

公开(公告)号：US20180315664A1

公开(公告)日：2018-11-01

申请号：US15725544

申请日：2017-10-05

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Ming-Lung Cheng ,  Yen-Chun Lin ,  Da-Wen Lin

IPC: H01L21/8238 ,  H01L27/092

Abstract: A semiconductor device includes a P-type Field Effect Transistor (PFET) and an NFET. The PFET includes an N-well disposed in a substrate, a first fin structure disposed over the N-well, a first liner layer disposed over the N-well, and a second liner layer disposed over the first liner layer. The first liner layer and the second liner layer include different materials. The NFET includes a P-well disposed in the substrate, a second fin structure disposed over the P-well, a third liner layer disposed over the P-well. The third liner layer and the second liner layer include the same materials.