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公开(公告)号:US20220260932A1
公开(公告)日:2022-08-18
申请号:US17481010
申请日:2021-09-21
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Pei-Cheng Hsu , Ping-Hsun Lin , Ta-Cheng Lien , Hsin-Chang Lee
IPC: G03F7/20 , C23C16/455
Abstract: Coated nanotubes and bundles of nanotubes are formed into membranes useful in optical assemblies in EUV photolithography systems. These optical assemblies are useful in methods for patterning materials on a semiconductor substrate. Such methods involve generating, in a UV lithography system, UV radiation. The UV radiation is passed through a coating layer of the optical assembly, e.g., a pellicle assembly. The UV radiation that has passed through the coating layer is passed through a matrix of individual nanotubes or matrix of nanotube bundles. UV radiation that passes through the matrix of individual nanotubes or matrix of nanotube bundles is reflected from a mask and received at a semiconductor substrate.
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公开(公告)号:US11360384B2
公开(公告)日:2022-06-14
申请号:US16568028
申请日:2019-09-11
Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
Inventor: Chun-Fu Yang , Pei-Cheng Hsu , Ta-Cheng Lien , Hsin-Chang Lee
Abstract: A method includes placing a photomask having a contamination on a surface thereof in a plasma processing chamber. The contaminated photomask is plasma processed in the plasma processing chamber to remove the contamination from the surface. The plasma includes oxygen plasma or hydrogen plasma.
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23.
公开(公告)号:US20220121103A1
公开(公告)日:2022-04-21
申请号:US17568037
申请日:2022-01-04
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Pei-Cheng Hsu , Chun-Fu Yang , Ta-Cheng Lien , Hsin-Chang Lee
Abstract: The present disclosure describes a method of patterning a semiconductor wafer using extreme ultraviolet lithography (EUVL). The method includes receiving an EUVL mask that includes a substrate having a low temperature expansion material, a reflective multilayer over the substrate, a capping layer over the reflective multilayer, and an absorber layer over the capping layer. The method further includes patterning the absorber layer to form a trench on the EUVL mask, wherein the trench has a first width above a target width. The method further includes treating the EUVL mask with oxygen plasma to reduce the trench to a second width, wherein the second width is below the target width. The method may also include treating the EUVL mask with nitrogen plasma to protect the capping layer, wherein the treating of the EUVL mask with the nitrogen plasma expands the trench to a third width at the target width.
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24.
公开(公告)号:US20210033960A1
公开(公告)日:2021-02-04
申请号:US16776046
申请日:2020-01-29
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Pei-Cheng Hsu , Chun-Fu Yang , Ta-Cheng Lien , Hsin-Chang Lee
Abstract: The present disclosure describes a method of patterning a semiconductor wafer using extreme ultraviolet lithography (EUVL). The method includes receiving an EUVL mask that includes a substrate having a low temperature expansion material, a reflective multilayer over the substrate, a capping layer over the reflective multilayer, and an absorber layer over the capping layer. The method further includes patterning the absorber layer to form a trench on the EUVL mask, wherein the trench has a first width above a target width. The method further includes treating the EUVL mask with oxygen plasma to reduce the trench to a second width, wherein the second width is below the target width. The method may also include treating the EUVL mask with nitrogen plasma to protect the capping layer, wherein the treating of the EUVL mask with the nitrogen plasma expands the trench to a third width at the target width.
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公开(公告)号:US12153337B2
公开(公告)日:2024-11-26
申请号:US18395234
申请日:2023-12-22
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Pei-Cheng Hsu , Ta-Cheng Lien , Hsin-Chang Lee
IPC: G03F1/24
Abstract: An extreme ultraviolet mask including a substrate, a reflective multilayer stack on the substrate and a patterned absorber layer on the reflective multilayer stack is provided. The patterned absorber layer includes an alloy comprising tantalum and at least one alloying element. The at least one alloying element includes at least one transition metal element or at least one Group 14 element.
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26.
公开(公告)号:US11960201B2
公开(公告)日:2024-04-16
申请号:US18317368
申请日:2023-05-15
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Pei-Cheng Hsu , Chun-Fu Yang , Ta-Cheng Lien , Hsin-Chang Lee
CPC classification number: G03F1/24 , G03F1/70 , G03F7/2004
Abstract: The present disclosure describes a method of patterning a semiconductor wafer using extreme ultraviolet lithography (EUVL). The method includes receiving an EUVL mask that includes a substrate having a low temperature expansion material, a reflective multilayer over the substrate, a capping layer over the reflective multilayer, and an absorber layer over the capping layer. The method further includes patterning the absorber layer to form a trench on the EUVL mask, wherein the trench has a first width above a target width. The method further includes treating the EUVL mask with oxygen plasma to reduce the trench to a second width, wherein the second width is below the target width. The method may also include treating the EUVL mask with nitrogen plasma to protect the capping layer, wherein the treating of the EUVL mask with the nitrogen plasma expands the trench to a third width at the target width.
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公开(公告)号:US11852965B2
公开(公告)日:2023-12-26
申请号:US17331517
申请日:2021-05-26
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Pei-Cheng Hsu , Ta-Cheng Lien , Hsin-Chang Lee
IPC: G03F1/24
CPC classification number: G03F1/24
Abstract: An extreme ultraviolet mask including a substrate, a reflective multilayer stack on the substrate and a patterned absorber layer on the reflective multilayer stack is provided. The patterned absorber layer includes an alloy comprising tantalum and at least one alloying element. The at least one alloying element includes at least one transition metal element or at least one Group 14 element.
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公开(公告)号:US11619875B2
公开(公告)日:2023-04-04
申请号:US17090825
申请日:2020-11-05
Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
Inventor: Hsin-Chang Lee , Chia-Jen Chen , Pei-Cheng Hsu , Ta-Cheng Lien
Abstract: In a method of manufacturing a reflective mask, a photo resist layer is formed over a mask blank. The mask blank includes a substrate, a reflective multilayer on the substrate, a capping layer on the reflective multilayer, an absorber layer on the capping layer and a hard mask layer, and the absorber layer is made of Cr, CrO or CrON. The photo resist layer is patterned, the hard mask layer is patterned by using the patterned photo resist layer, the absorber layer is patterned by using the patterned hard mask layer, and an additional element is introduced into the patterned absorber layer to form a converted absorber layer.
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公开(公告)号:US11561464B2
公开(公告)日:2023-01-24
申请号:US17532939
申请日:2021-11-22
Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
Inventor: Pei-Cheng Hsu , Ta-Cheng Lien , Hsin-Chang Lee
Abstract: An extreme ultra-violet mask includes a substrate, a multi-layered mirror layer, a capping layer, a first tantalum-containing oxide layer, a tantalum-containing nitride layer, and a second tantalum-containing oxide layer. The multi-layered mirror layer is over the substrate. The capping layer is over the multi-layered mirror layer. The first tantalum-containing oxide layer is over the capping layer. The tantalum-containing nitride layer is over the first tantalum-containing oxide layer. The second tantalum-containing oxide layer is over the tantalum-containing nitride layer.
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公开(公告)号:US11204545B2
公开(公告)日:2021-12-21
申请号:US16744732
申请日:2020-01-16
Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
Inventor: Pei-Cheng Hsu , Ching-Huang Chen , Hung-Yi Tsai , Ming-Wei Chen , Ta-Cheng Lien , Hsin-Chang Lee
IPC: G03F1/24
Abstract: A reflective mask includes a substrate, a reflective multilayer disposed on the substrate, a capping layer disposed on the reflective multilayer, and an absorber layer disposed on the capping layer. The absorber layer includes one or more alternating pairs of a first Cr based layer and a second Cr based layer different from the first Cr based layer.
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