公开(公告)号：US11960201B2

公开(公告)日：2024-04-16

申请号：US18317368

申请日：2023-05-15

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Pei-Cheng Hsu ,  Chun-Fu Yang ,  Ta-Cheng Lien ,  Hsin-Chang Lee

IPC: G03F1/24 ,  G03F1/70 ,  G03F7/20

CPC classification number: G03F1/24 ,  G03F1/70 ,  G03F7/2004

Abstract: The present disclosure describes a method of patterning a semiconductor wafer using extreme ultraviolet lithography (EUVL). The method includes receiving an EUVL mask that includes a substrate having a low temperature expansion material, a reflective multilayer over the substrate, a capping layer over the reflective multilayer, and an absorber layer over the capping layer. The method further includes patterning the absorber layer to form a trench on the EUVL mask, wherein the trench has a first width above a target width. The method further includes treating the EUVL mask with oxygen plasma to reduce the trench to a second width, wherein the second width is below the target width. The method may also include treating the EUVL mask with nitrogen plasma to protect the capping layer, wherein the treating of the EUVL mask with the nitrogen plasma expands the trench to a third width at the target width.

公开(公告)号：US20230280645A1

公开(公告)日：2023-09-07

申请号：US18317368

申请日：2023-05-15

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Pei-Cheng Hsu ,  Chun-Fu Yang ,  Ta-Cheng Lien ,  Hsin-Chang Lee

IPC: G03F1/24 ,  G03F7/20 ,  G03F1/70

CPC classification number: G03F1/24 ,  G03F1/70 ,  G03F7/2004

Abstract: The present disclosure describes a method of patterning a semiconductor wafer using extreme ultraviolet lithography (EUVL). The method includes receiving an EUVL mask that includes a substrate having a low temperature expansion material, a reflective multilayer over the substrate, a capping layer over the reflective multilayer, and an absorber layer over the capping layer. The method further includes patterning the absorber layer to form a trench on the EUVL mask, wherein the trench has a first width above a target width. The method further includes treating the EUVL mask with oxygen plasma to reduce the trench to a second width, wherein the second width is below the target width. The method may also include treating the EUVL mask with nitrogen plasma to protect the capping layer, wherein the treating of the EUVL mask with the nitrogen plasma expands the trench to a third width at the target width.

公开(公告)号：US20240264520A1

公开(公告)日：2024-08-08

申请号：US18635209

申请日：2024-04-15

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Pei-Cheng Hsu ,  Chun-Fu Yang ,  Ta-Cheng Lien ,  Hsin-Chang Lee

IPC: G03F1/24 ,  G03F1/70 ,  G03F7/20

CPC classification number: G03F1/24 ,  G03F1/70 ,  G03F7/2004

Abstract: The present disclosure describes a method of patterning a semiconductor wafer using extreme ultraviolet lithography (EUVL). The method includes receiving an EUVL mask that includes a substrate having a low temperature expansion material, a reflective multilayer over the substrate, a capping layer over the reflective multilayer, and an absorber layer over the capping layer. The method further includes patterning the absorber layer to form a trench on the EUVL mask, wherein the trench has a first width above a target width. The method further includes treating the EUVL mask with oxygen plasma to reduce the trench to a second width, wherein the second width is below the target width. The method may also include treating the EUVL mask with nitrogen plasma to protect the capping layer, wherein the treating of the EUVL mask with the nitrogen plasma expands the trench to a third width at the target width.

公开(公告)号：US11215918B2

公开(公告)日：2022-01-04

申请号：US16776046

申请日：2020-01-29

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Pei-Cheng Hsu ,  Chun-Fu Yang ,  Ta-Cheng Lien ,  Hsin-Chang Lee

IPC: G03F1/24 ,  G03F1/70 ,  G03F7/20

Abstract: The present disclosure describes a method of patterning a semiconductor wafer using extreme ultraviolet lithography (EUVL). The method includes receiving an EUVL mask that includes a substrate having a low temperature expansion material, a reflective multilayer over the substrate, a capping layer over the reflective multilayer, and an absorber layer over the capping layer. The method further includes patterning the absorber layer to form a trench on the EUVL mask, wherein the trench has a first width above a target width. The method further includes treating the EUVL mask with oxygen plasma to reduce the trench to a second width, wherein the second width is below the target width. The method may also include treating the EUVL mask with nitrogen plasma to protect the capping layer, wherein the treating of the EUVL mask with the nitrogen plasma expands the trench to a third width at the target width.

公开(公告)号：US11650493B2

公开(公告)日：2023-05-16

申请号：US17568037

申请日：2022-01-04

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Pei-Cheng Hsu ,  Chun-Fu Yang ,  Ta-Cheng Lien ,  Hsin-Chang Lee

IPC: G03F1/24 ,  G03F1/70 ,  G03F7/20

CPC classification number: G03F1/24 ,  G03F1/70 ,  G03F7/2004

Abstract: The present disclosure describes a method of patterning a semiconductor wafer using extreme ultraviolet lithography (EUVL). The method includes receiving an EUVL mask that includes a substrate having a low temperature expansion material, a reflective multilayer over the substrate, a capping layer over the reflective multilayer, and an absorber layer over the capping layer. The method further includes patterning the absorber layer to form a trench on the EUVL mask, wherein the trench has a first width above a target width. The method further includes treating the EUVL mask with oxygen plasma to reduce the trench to a second width, wherein the second width is below the target width. The method may also include treating the EUVL mask with nitrogen plasma to protect the capping layer, wherein the treating of the EUVL mask with the nitrogen plasma expands the trench to a third width at the target width.

公开(公告)号：US11360384B2

公开(公告)日：2022-06-14

申请号：US16568028

申请日：2019-09-11

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

Inventor： Chun-Fu Yang ,  Pei-Cheng Hsu ,  Ta-Cheng Lien ,  Hsin-Chang Lee

IPC: G03F1/82 ,  G03F7/20

Abstract: A method includes placing a photomask having a contamination on a surface thereof in a plasma processing chamber. The contaminated photomask is plasma processed in the plasma processing chamber to remove the contamination from the surface. The plasma includes oxygen plasma or hydrogen plasma.

公开(公告)号：US20220121103A1

公开(公告)日：2022-04-21

申请号：US17568037

申请日：2022-01-04

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Pei-Cheng Hsu ,  Chun-Fu Yang ,  Ta-Cheng Lien ,  Hsin-Chang Lee

IPC: G03F1/24 ,  G03F1/70 ,  G03F7/20

Abstract: The present disclosure describes a method of patterning a semiconductor wafer using extreme ultraviolet lithography (EUVL). The method includes receiving an EUVL mask that includes a substrate having a low temperature expansion material, a reflective multilayer over the substrate, a capping layer over the reflective multilayer, and an absorber layer over the capping layer. The method further includes patterning the absorber layer to form a trench on the EUVL mask, wherein the trench has a first width above a target width. The method further includes treating the EUVL mask with oxygen plasma to reduce the trench to a second width, wherein the second width is below the target width. The method may also include treating the EUVL mask with nitrogen plasma to protect the capping layer, wherein the treating of the EUVL mask with the nitrogen plasma expands the trench to a third width at the target width.

公开(公告)号：US20210033960A1

公开(公告)日：2021-02-04

申请号：US16776046

申请日：2020-01-29

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Pei-Cheng Hsu ,  Chun-Fu Yang ,  Ta-Cheng Lien ,  Hsin-Chang Lee

IPC: G03F1/24 ,  G03F1/54 ,  G03F1/80 ,  G03F1/48 ,  G03F1/70 ,  G03F7/20

Abstract: The present disclosure describes a method of patterning a semiconductor wafer using extreme ultraviolet lithography (EUVL). The method includes receiving an EUVL mask that includes a substrate having a low temperature expansion material, a reflective multilayer over the substrate, a capping layer over the reflective multilayer, and an absorber layer over the capping layer. The method further includes patterning the absorber layer to form a trench on the EUVL mask, wherein the trench has a first width above a target width. The method further includes treating the EUVL mask with oxygen plasma to reduce the trench to a second width, wherein the second width is below the target width. The method may also include treating the EUVL mask with nitrogen plasma to protect the capping layer, wherein the treating of the EUVL mask with the nitrogen plasma expands the trench to a third width at the target width.