公开(公告)号：US08063866B2

公开(公告)日：2011-11-22

申请号：US12257778

申请日：2008-10-24

申请人： Hirotaka Hayashi ,  Takashi Nakamura ,  Masayoshi Fuchi ,  Masahiro Tada ,  Hiroki Nakamura

发明人： Hirotaka Hayashi ,  Takashi Nakamura ,  Masayoshi Fuchi ,  Masahiro Tada ,  Hiroki Nakamura

IPC分类号： G09G3/36

CPC分类号： G09G3/20 ,  G09G3/3611 ,  G09G2360/144 ,  G09G2360/145

摘要： A capacitor charged beforehand is discharged according to a light surrounding a display unit. A data is decreased similarly to the voltage between the electrodes of the capacitor. A trigger signal is outputted if the data becomes equal to or less than a threshold value. A clock signal whose cycle of changing levels gradually becomes long is generated. A count value is updated at each change of the clock signal's level and the updated count value is outputted. The count value is sampled when the trigger signal is outputted.

摘要翻译： 预先充电的电容器根据显示单元周围的光而放电。 与电容器的电极之间的电压类似地减小数据。 如果数据变得等于或小于阈值，则输出触发信号。 生成变化级别的周期变长的时钟信号。 在时钟信号电平的每次改变时更新计数值，并且输出更新的计数值。 当输出触发信号时对计数值进行采样。

公开(公告)号：US08039893B2

公开(公告)日：2011-10-18

申请号：US12284327

申请日：2008-09-19

申请人： Fujio Masuoka ,  Hiroki Nakamura

发明人： Fujio Masuoka ,  Hiroki Nakamura

IPC分类号： H01L29/732

CPC分类号： H01L27/092 ,  H01L21/823885 ,  H01L27/1203 ,  H01L29/78642 ,  H01L2924/0002 ,  H01L2924/00

摘要： There is provided a semiconductor device formed of a highly integrated high-speed CMOS inverter coupling circuit using SGTs provided on at least two stages. A semiconductor device according to the present invention is formed of a CMOS inverter coupling circuit in which n (n is two or above) CMOS inverters are coupled with each other, each of the n inverters has: a pMOS SGT; an nMOS SGT, an input terminal arranged so as to connect a gate of the pMOS SGT with a gate of the nMOS SGT; an output terminal arranged to connect a drain diffusion layer of the pMOS SGT with a drain diffusion layer of the nMOS SGT in an island-shaped semiconductor lower layer; a pMOS SGT power supply wiring line arranged on a source diffusion layer of the pMOS SGT; and an nMOS SGT power supply wiring line arranged on a source diffusion layer of the NMOS SGT, and an n−1th output terminal is connected with an nth input terminal.

摘要翻译： 提供了由至少两级提供的使用SGT的高度集成的高速CMOS反相器耦合电路形成的半导体器件。 根据本发明的半导体器件由CMOS反相器耦合电路形成，其中n（n是两个或更多个）CMOS反相器彼此耦合，每个n个反相器具有：pMOS SGT; nMOS SGT，被配置为将pMOS SGT的栅极与nMOS SGT的栅极连接的输入端子; 输出端子，布置成在岛状半导体下层中连接pMOS SGT的漏极扩散层和nMOS SGT的漏极扩散层; 配置在pMOS SGT的源极扩散层上的pMOS SGT电源布线; 以及配置在NMOS SGT的源极扩散层上的nMOS SGT电源配线，第n输出端与第n输入端子连接。

公开(公告)号：US07956388B2

公开(公告)日：2011-06-07

申请号：US12603001

申请日：2009-10-21

申请人： Fujio Masuoka ,  Hiroki Nakamura

发明人： Fujio Masuoka ,  Hiroki Nakamura

IPC分类号： H01L27/148

CPC分类号： H01L27/14812 ,  H01L29/768

摘要： It is intended to provide a solid-state image pickup element capable of reducing an area of a read channel to increase a light-receiving area. The solid-state image pickup element comprises a p-type planar semiconductor, a hole formed in the p-type planar semiconductor, a p+-type region formed in a bottom of the hole, a p+-type isolation region formed in a part of a sidewall of the hole and connected to the p+-type region, an n-type photoelectric conversion region formed beneath the p+-type region, a transfer electrode formed on the entire sidewall of the hole through a gate dielectric film, a CCD channel region formed in a top of the p-type planar semiconductor, and a read channel formed in a region of the p-type planar semiconductor between the n-type photoelectric conversion region and the CCD channel region.

摘要翻译： 旨在提供一种能够减小读通道的面积以增加光接收面积的固态图像拾取元件。 固态摄像元件包括p型平面半导体，在p型平面半导体中形成的孔，形成在孔的底部的p +型区，形成在p型平面半导体的一部分中的p +型隔离区 所述孔的侧壁连接到p +型区域，形成在p +型区域下方的n型光电转换区域，通过栅极电介质膜形成在孔的整个侧壁上的转移电极，CCD通道区域 形成在p型平面半导体的顶部，以及形成在n型光电转换区域和CCD沟道区域之间的p型平面半导体区域中的读取沟道。

公开(公告)号：US07940573B2

公开(公告)日：2011-05-10

申请号：US12319770

申请日：2009-01-12

申请人： Fujio Masuoka ,  Hiroki Nakamura

发明人： Fujio Masuoka ,  Hiroki Nakamura

IPC分类号： G11C16/04

CPC分类号： G11C16/0416 ,  H01L27/11521 ,  H01L27/11556 ,  H01L27/11568 ,  H01L29/7881 ,  H01L29/792 ,  H01L29/7926

摘要： To provide a NOR-type nonvolatile semiconductor memory that can inject electric charge into a charge accumulation layer through the use of an FN tunnel current without compromising an increase in the packing density of memory cells. The above problem is solved by a nonvolatile semiconductor memory in which nonvolatile semiconductor memory cells are arranged in a matrix, each nonvolatile semiconductor memory cell having an island semiconductor layer in which a drain diffusion layer formed in the upper part of the island semiconductor layer, a source diffusion layer formed in the lower part of the island semiconductor layer, a charge accumulation layer formed on a channel region of the side wall sandwiched between the drain diffusion layer and the source diffusion layer via a gate insulation film, and a control gate formed on the charge accumulation layer are formed. Further, bit lines connected to the drain diffusion layer are laid out in a column direction, control gate lines are laid out in a row direction, and source lines connected to the source diffusion layer are laid out in the column direction.

摘要翻译： 提供一种NOR型非易失性半导体存储器，其可以通过使用FN隧道电流将电荷注入电荷累积层，而不会影响存储单元的堆积密度的增加。 上述问题是通过非易失性半导体存储器来解决的，其中非易失性半导体存储单元被排列成矩阵，每个非易失性半导体存储单元具有岛状半导体层，其中形成在岛状半导体层的上部的漏极扩散层， 形成在岛状半导体层的下部的源极扩散层，形成在通过栅极绝缘膜夹在漏极扩散层和源极扩散层之间的侧壁的沟道区域上的电荷累积层，以及形成在栅极绝缘膜上的控制栅极 形成电荷累积层。 此外，连接到漏极扩散层的位线沿列方向布置，控制栅极线布置在行方向上，并且连接到源极扩散层的源极线在列方向上布置。

公开(公告)号：US07924273B2

公开(公告)日：2011-04-12

申请号：US11868126

申请日：2007-10-05

申请人： Hiroki Nakamura ,  Takashi Nakamura ,  Hirotaka Hayashi ,  Norio Tada ,  Takayuki Imai

发明人： Hiroki Nakamura ,  Takashi Nakamura ,  Hirotaka Hayashi ,  Norio Tada ,  Takayuki Imai

IPC分类号： G06F3/042

CPC分类号： G06F3/0412 ,  G06F3/042

摘要： In making a contact determination between an object and a display screen, a display apparatus of the present invention is capable of adjusting a region on which to make a contact determination in response to the displayed image in a liquid crystal panel, so that the influence by the displayed image can be suppressed. Moreover, for simplifying the contact determination process, the display apparatus sets solid a region in the picked-up image that is not a target of the contact determination, with a predetermined gradation value.

摘要翻译： 在物体和显示屏幕之间进行接触确定时，本发明的显示装置能够根据液晶面板中显示的图像来调整在其上进行接触确定的区域，从而影响到 可以抑制显示的图像。 此外，为了简化接触确定处理，显示装置以预定的灰度值将不是接触确定的目标的拍摄图像中的区域固定。

公开(公告)号：US20110059788A1

公开(公告)日：2011-03-10

申请号：US12878622

申请日：2010-09-09

申请人： Takehisa Itagaki ,  Masahiko Konishi ,  Masaya Honda ,  Masahiro Yoshida ,  Hiroki Saito ,  Kazumasa Yoshizawa ,  Hiroki Nakamura ,  Kenta Sugano

发明人： Takehisa Itagaki ,  Masahiko Konishi ,  Masaya Honda ,  Masahiro Yoshida ,  Hiroki Saito ,  Kazumasa Yoshizawa ,  Hiroki Nakamura ,  Kenta Sugano

IPC分类号： A63F9/24 ,  A63F13/00

CPC分类号： G07F17/34 ,  G07F17/3244 ,  G07F17/3267

摘要： The present invention provides a gaming machine with new entertainability, which executes processing of: (A) executing a normal game; (B) accepting an input of selecting any of the plurality of the specific symbols stop-displayed, in response to a fact that a plurality of the specific symbols are stop-displayed, in the normal game executed in the processing (A); (C) awarding a benefit according to the specific symbols selected in the processing (B); (D) determining whether or not to generate a specific game state, in response to the specific symbols selected in the processing (B); (E) accepting an input of selecting a specific symbol other than the specific symbol selected in the processing (B), from among the plurality of specific symbols stop-displayed, in response to a fact that it is determined that the specific game state is generated in the processing (D); and (F) awarding a benefit according to the specific symbol selected in the processing (E).

摘要翻译： 本发明提供了具有新的娱乐性的游戏机，其执行以下处理：（A）执行正常游戏; （B）在处理（A）中执行的正常游戏中，响应于停止显示多个特定符号的事实，接受选择停止显示的多个特定符号中的任何一个的输入; （C）根据处理（B）中选择的特定符号颁发利益; （D）响应于在处理（B）中选择的特定符号来确定是否生成特定游戏状态; （E）响应于确定特定游戏状态为（否）的事实接受从所述多个特定符号中选择在所述处理（B）中选择的所述特定符号之外的特定符号的输入， 在处理（D）中产生; 和（F）根据处理（E）中选择的特定符号授予福利。

公开(公告)号：US07851382B2

公开(公告)日：2010-12-14

申请号：US12155020

申请日：2008-05-29

申请人： Hiroki Nakamura ,  Hideki Kawahara

发明人： Hiroki Nakamura ,  Hideki Kawahara

IPC分类号： H01L21/469

CPC分类号： H01L21/046 ,  H01L21/0465 ,  H01L29/045 ,  H01L29/1608 ,  H01L29/66068 ,  H01L29/7828

摘要： A method for manufacturing a SiC semiconductor device includes: forming an impurity layer in a SiC layer; and forming an oxide film on the SiC layer. The forming the impurity layer includes: implanting an impurity in the SiC layer; applying a cap layer on the SiC layer; annealing the cap layer to be transformed to a carbon layer; annealing the SiC layer to activate the impurity with covering the SiC layer with the carbon layer; removing the carbon layer; and performing a sacrifice oxidation process. The performing the sacrifice oxidation process includes: forming a sacrifice oxide film; and removing the sacrifice oxide film. The forming the oxide film is performed after the performing the sacrifice oxidation process.

摘要翻译： 一种制造SiC半导体器件的方法包括：在SiC层中形成杂质层; 在SiC层上形成氧化膜。 形成杂质层包括：在SiC层中注入杂质; 在SiC层上施加覆盖层; 对盖层进行退火以转变为碳层; 退火SiC层以使碳层覆盖SiC层来激活杂质; 去除碳层; 并进行牺牲氧化处理。 进行牺牲氧化处理包括：形成牺牲氧化膜; 并除去牺牲氧化膜。 在进行牺牲氧化处理之后进行氧化膜的形成。

公开(公告)号：US07790612B2

公开(公告)日：2010-09-07

申请号：US11531873

申请日：2006-09-14

申请人： Hiroki Nakamura ,  Masaki Kado ,  Shigeru Aomori

发明人： Hiroki Nakamura ,  Masaki Kado ,  Shigeru Aomori

IPC分类号： H01L21/4763 ,  H01L21/00

CPC分类号： H01L21/76838 ,  H01L27/12 ,  H01L27/124 ,  H01L29/458 ,  H01L29/4908

摘要： A method for forming a wiring structure includes forming a metal layer on a substrate, and annealing the metal layer by irradiating the metal layer with light emitted from at least one flash tube, thereby growing crystalline grains of the metal layer.

摘要翻译： 一种形成布线结构的方法包括：在基板上形成金属层，并且通过用从至少一个闪光管发射的光照射金属层来对金属层进行退火，从而生长金属层的晶粒。

公开(公告)号：US07745276B2

公开(公告)日：2010-06-29

申请号：US12068263

申请日：2008-02-05

申请人： Eiichi Okuno ,  Hiroki Nakamura ,  Naohiro Suzuki

发明人： Eiichi Okuno ,  Hiroki Nakamura ,  Naohiro Suzuki

IPC分类号： H01L21/8234

CPC分类号： H01L29/7828 ,  H01L29/045 ,  H01L29/0615 ,  H01L29/0619 ,  H01L29/0657 ,  H01L29/1608 ,  H01L29/45 ,  H01L29/66068 ,  H01L29/7802 ,  H01L29/7811 ,  H01L29/7813

摘要： A method for manufacturing a SiC semiconductor device includes: preparing a SiC substrate having a (11-20)-orientation surface; forming a drift layer on the substrate; forming a base region in the drift layer; forming a first conductivity type region in the base region; forming a channel region on the base region to couple between the drift layer and the first conductivity type region; forming a gate insulating film on the channel region; forming a gate electrode on the gate insulating film; forming a first electrode to electrically connect to the first conductivity type region; and forming a second electrode on a backside of the substrate. The device controls current between the first and second electrodes by controlling the channel region. The forming the base region includes epitaxially forming a lower part of the base region on the drift layer.

摘要翻译： 一种制造SiC半导体器件的方法包括：制备具有（11-20）取向表面的SiC衬底; 在衬底上形成漂移层; 在漂移层中形成基极区; 在所述基底区域中形成第一导电类型区域; 在所述基极区上形成沟道区，以在所述漂移层和所述第一导电类型区之间耦合; 在沟道区上形成栅极绝缘膜; 在栅极绝缘膜上形成栅电极; 形成电连接到所述第一导电类型区域的第一电极; 以及在所述衬底的背面上形成第二电极。 该器件通过控制沟道区域来控制第一和第二电极之间的电流。 形成基极区域包括外延地形成漂移层上的基极区域的下部。

公开(公告)号：US07701448B2

公开(公告)日：2010-04-20

申请号：US11695235

申请日：2007-04-02

申请人： Hiroki Nakamura ,  Takashi Nakamura ,  Hirotaka Hayashi ,  Norio Tada ,  Takayuki Imai

发明人： Hiroki Nakamura ,  Takashi Nakamura ,  Hirotaka Hayashi ,  Norio Tada ,  Takayuki Imai

IPC分类号： G09G3/36 ,  G06F3/042

CPC分类号： G06F3/0412 ,  G02F1/13318 ,  G02F1/13338 ,  G02F2001/13312 ,  G02F2203/11 ,  G06F3/042 ,  H04N5/23293 ,  H04N5/2354

摘要： A liquid crystal panel brightness controller notifies a backlight controller that an illuminance of ambient light is equal to or less than a threshold value. Upon notification, the backlight controller causes invisible light emitted, for example. The invisible light passes through a liquid crystal panel and is reflected by an imaging target and is received by photosensors. Accordingly, the decrease in the amount of the visible light received by photosensors is compensated. As a result, an image with a high S/N ratio is obtained.

摘要翻译： 液晶面板亮度控制器向背光控制器通知环境光的照度等于或小于阈值。 通知后，例如，背光控制器引起发出的不可见光。 不可见光通过液晶面板并被成像目标物反射并被光电传感器接收。 因此，补偿由光电传感器接收的可见光量的减少。 结果，获得了具有高S / N比的图像。