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公开(公告)号：US11600936B2
公开(公告)日：2023-03-07
申请号：US17322906
申请日：2021-05-18
Applicant: Unimicron Technology Corp.
Inventor： Tzyy-Jang Tseng , Pei-Wei Wang , Ching-Ho Hsieh , Shao-Chien Lee , Kuo-Wei Li
Abstract: A circuit board structure has a first flexible circuit board, a second flexible circuit board, and a rigid board structure. The first flexible circuit board has a first dielectric layer and a first conductive circuit. The second flexible circuit board has a second dielectric layer and a second conductive circuit. The rigid board structure connects the first flexible circuit board and the second flexible circuit board. The rigid board structure has a third dielectric layer and a third conductive circuit. A dielectric loss value of the third dielectric layer is less than that of each of the first dielectric layer and the second dielectric layer. The third conductive circuit is electrically connected to the first and second conductive circuits.
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公开(公告)号：US11562972B2
公开(公告)日：2023-01-24
申请号：US17463559
申请日：2021-09-01
Applicant: Unimicron Technology Corp.
Inventor： John Hon-Shing Lau , Yu-Chi Shen , Tzyy-Jang Tseng , Chen-Hua Cheng , Pei-Wei Wang
Abstract: A chip package structure includes at least one chip, at least one thermally conductive element, a molding compound, and a redistribution layer. The respective chip has an active surface and a back surface opposite to each other and a plurality of electrodes disposed on the active surface. The thermally conductive element is disposed on the back surface of the respective chip. The molding compound encapsulates the chip and the thermally conductive element and has an upper surface and a lower surface opposite to each other. A bottom surface of each of the electrodes of the respective chip is aligned with the lower surface of the molding compound. The molding compound exposes a top surface of the respective thermally conductive element. The redistribution layer is disposed on the lower surface of the molding compound and electrically connected to the electrodes of the respective chip.
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公开(公告)号：US11516910B1
公开(公告)日：2022-11-29
申请号：US17371114
申请日：2021-07-09
Applicant: Unimicron Technology Corp.
Inventor： Chia-Yu Peng , John Hon-Shing Lau , Kai-Ming Yang , Pu-Ju Lin , Cheng-Ta Ko , Tzyy-Jang Tseng
Abstract: A circuit board structure includes a redistribution structure layer, a build-up circuit structure layer, and a connection structure layer. The redistribution structure layer has a first and second surface, and includes an inner and outer dielectric layer, first connecting pads, and chip pads. A bottom surface of each first connecting pad is aligned with the first surface, and the chip pads are protruded from and located on the second surface. The build-up circuit structure layer includes second connecting pads. The connection structure layer is disposed between the redistribution structure layer and the build-up circuit structure layer and includes a substrate and conductive paste pillars penetrating the substrate. The first connecting pads are electrically connected to the second connecting pads via the conductive paste pillars, respectively. A top surface of each conductive paste pillar is aligned with the first surface of the redistribution structure layer.
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公开(公告)号：US20220287182A1
公开(公告)日：2022-09-08
申请号：US17826178
申请日：2022-05-27
Applicant: Unimicron Technology Corp.
Inventor： Tzyy-Jang Tseng , Yu-Hua Chen , Chun-Hsien Chien , Wen-Liang Yeh , Ra-Min Tain
Abstract: An embedded component structure includes a board, an electronic component, and a dielectric material layer. The board has a through cavity. The board includes an insulating core layer and a conductive member. The insulating core layer has a first surface and a second surface opposite thereto. The through cavity penetrates the insulating core layer. The conductive member extends from a portion of the first surface along a portion of the side wall of the through cavity to a portion of the second surface. The electronic component includes an electrode. The electronic component is disposed in the through cavity. The dielectric material layer is at least filled in the through cavity. The connection circuit layer covers and contacts the conductive member and the electrode. A manufacturing method of an embedded component structure is also provided.
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公开(公告)号：US11410940B2
公开(公告)日：2022-08-09
申请号：US17170736
申请日：2021-02-08
Applicant: Unimicron Technology Corp.
Inventor： Pu-Ju Lin , Cheng-Ta Ko , Yu-Hua Chen , Tzyy-Jang Tseng , Ra-Min Tain
Abstract: A package structure includes a redistribution structure, a chip, one or more structural reinforcing elements, and a protective layer. The redistribution structure includes a first circuit layer and a second circuit layer disposed over the first circuit layer. The first circuit layer is electrically connected to the second circuit layer. The chip is disposed over the redistribution structure and electrically connected to the second circuit layer. The one or more structural reinforcing elements are disposed over the redistribution structure. The structural reinforcing element has a Young's modulus in a range of 30 to 200 GPa. The protective layer overlays the chip and a sidewall of the structural reinforcing element.
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Patent Agency Ranking
公开(公告)号：US20220238471A1
公开(公告)日：2022-07-28
申请号：US17200922
申请日：2021-03-15
Applicant: Unimicron Technology Corp.
Inventor： Tzyy-Jang Tseng , Ming-Ru Chen , Cheng-Chung Lo , Chin-Sheng Wang , Wen-Sen Tang
IPC: H01L23/00 , H01L25/075 , H01L27/12 , H01L33/62
Abstract: A manufacturing method of a metal bump structure is provided. A driving base is provided. At least one pad and an insulating layer are formed on the driving base. The pad is formed on an arrangement surface of the driving base and has an upper surface. The insulating layer covers the arrangement surface of the driving base and the pad, and exposes a part of the upper surface of the pad. A patterned metal layer is formed on the upper surface of the pad exposed by the insulating layer, and extends to cover a part of the insulating layer. An electro-less plating process is performed to form at least one metal bump on the patterned metal layer. A first extension direction of the metal bump is perpendicular to a second extension direction of the driving base.
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公开(公告)号：US20210398925A1
公开(公告)日：2021-12-23
申请号：US17463559
申请日：2021-09-01
Applicant: Unimicron Technology Corp.
Inventor： John Hon-Shing Lau , Yu-Chi Shen , Tzyy-Jang Tseng , Chen-Hua Cheng , Pei-Wei Wang
Abstract: A chip package structure includes at least one chip, at least one thermally conductive element, a molding compound, and a redistribution layer. The respective chip has an active surface and a back surface opposite to each other and a plurality of electrodes disposed on the active surface. The thermally conductive element is disposed on the back surface of the respective chip. The molding compound encapsulates the chip and the thermally conductive element and has an upper surface and a lower surface opposite to each other. A bottom surface of each of the electrodes of the respective chip is aligned with the lower surface of the molding compound. The molding compound exposes a top surface of the respective thermally conductive element. The redistribution layer is disposed on the lower surface of the molding compound and electrically connected to the electrodes of the respective chip.
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公开(公告)号：US20210202407A1
公开(公告)日：2021-07-01
申请号：US16729488
申请日：2019-12-30
Applicant: Unimicron Technology Corp.
Inventor： John Hon-Shing Lau , Yu-Chi Shen , Tzyy-Jang Tseng , Chen-Hua Cheng , Pei-Wei Wang
Abstract: A chip package structure includes at least one chip, at least one thermally conductive element, a molding compound, and a redistribution layer. The respective chip has an active surface and a back surface opposite to each other and a plurality of electrodes disposed on the active surface. The thermally conductive element is disposed on the back surface of the respective chip. The molding compound encapsulates the chip and the thermally conductive element and has an upper surface and a lower surface opposite to each other. A bottom surface of each of the electrodes of the respective chip is aligned with the lower surface of the molding compound. The molding compound exposes a top surface of the respective thermally conductive element. The redistribution layer is disposed on the lower surface of the molding compound and electrically connected to the electrodes of the respective chip.
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公开(公告)号：US20210118839A1
公开(公告)日：2021-04-22
申请号：US16687557
申请日：2019-11-18
Applicant: Unimicron Technology Corp.
Inventor： Pu-Ju Lin , Cheng-Ta Ko , Ra-Min Tain , Tzyy-Jang Tseng
IPC: H01L23/00 , H01L23/538
Abstract: A chip package structure includes a substrate, at least two chips, a plurality of first pads, a plurality of first micro bumps, and a bridging element. The substrate has a first surface and a second surface opposite to the first surface. The two chips are disposed on the first surface of the substrate and are horizontally adjacent to each other. Each chip has an active surface. The first pads are disposed on the active surface of each of the chips. The first micro bumps are disposed on the first pads and have the same size. The bridging element is disposed on the first micro bumps such that one of the chips is electrically connected to another of the chips through the first pads, the first micro bumps, and the bridging element.
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公开(公告)号：US10957658B2
公开(公告)日：2021-03-23
申请号：US16866530
申请日：2020-05-04
Applicant: Unimicron Technology Corp.
Inventor： Pu-Ju Lin , Cheng-Ta Ko , Yu-Hua Chen , Tzyy-Jang Tseng , Ra-Min Tain
Abstract: A package structure includes a redistribution structure, a chip, one or more structural reinforcing elements, and a protective layer. The redistribution structure includes a first circuit layer and a second circuit layer disposed over the first circuit layer. The first circuit layer is electrically connected to the second circuit layer. The chip is disposed over the redistribution structure and electrically connected to the second circuit layer. The one or more structural reinforcing elements are disposed over the redistribution structure. The structural reinforcing element has a Young's modulus in a range of 30 to 200 GPa. The protective layer overlays the chip and a sidewall of the structural reinforcing element.
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