公开(公告)号：US20240251504A1

公开(公告)日：2024-07-25

申请号：US18172324

申请日：2023-02-22

Applicant: Unimicron Technology Corp.

Inventor： Kai-Ming Yang ,  Chen-Hao Lin ,  Chin-Sheng Wang ,  Cheng-Ta Ko ,  Pu-Ju Lin

IPC: H05K1/02 ,  H05K3/06 ,  H05K3/46

CPC classification number: H05K1/0298 ,  H05K3/067 ,  H05K3/4679 ,  H05K2201/09454 ,  H05K2203/0789

Abstract: The invention provides a circuit board structure and a manufacturing method thereof. The circuit board structure includes a line portion, a first insulating layer, and a conductive terminal. The first insulating layer is disposed on the line portion. The conductive terminal is disposed on the first insulating layer and embedded in the first insulating layer to be electrically connected with the line portion. The conductive terminal includes a first portion, a second portion, and a third portion. The first portion protrudes from a surface of the first insulating layer. The second portion is embedded in the first insulating layer and connected to the first portion. The third portion is disposed between the line portion and the second portion. A width of the second portion is greater than a width of the third portion.

公开(公告)号：US20230268257A1

公开(公告)日：2023-08-24

申请号：US17902902

申请日：2022-09-05

Applicant: Unimicron Technology Corp.

Inventor： Chin-Sheng Wang ,  Ra-Min Tain ,  Wen-Yu Lin ,  Tse-Wei Wang ,  Jun-Ho Chen ,  Guang-Hwa Ma

IPC: H01L23/498 ,  H01L23/66 ,  H01Q1/38 ,  H01L21/48

CPC classification number: H01L23/49811 ,  H01L23/66 ,  H01Q1/38 ,  H01L23/49822 ,  H01L23/49833 ,  H01L21/4853 ,  H01L21/4857 ,  H01L21/486 ,  H01L24/16

Abstract: An electronic package structure and its manufacturing method are provided. The electronic package structure includes an interposer, a circuit board, a chip, and a circuit structure. The interposer includes an interposer substrate and a coaxial conductive element located in the interposer substrate. The interposer substrate includes a cavity. The coaxial conductive element includes a first conductive structure, a second conductive structure surrounding the first conductive structure, and a first insulation structure. The first insulation structure is disposed between the first and second conductive structures. The circuit board is disposed on a lower surface of the interposer substrate and electrically connected to the coaxial conductive element. The chip is disposed in the cavity and located on the circuit board, so as to be electrically connected to the circuit board. The circuit structure is disposed on an upper surface of the interposer substrate and electrically connected to the coaxial conductive element.

公开(公告)号：US20230240023A1

公开(公告)日：2023-07-27

申请号：US17684421

申请日：2022-03-02

Applicant: Unimicron Technology Corp.

Inventor： Wen-Yu Lin ,  Kai-Ming Yang ,  Chen-Hao Lin ,  Pu-Ju Lin ,  Cheng-Ta Ko ,  Chin-Sheng Wang ,  Guang-Hwa Ma ,  Tzyy-Jang Tseng

IPC: H05K3/46 ,  H05K1/11

CPC classification number: H05K3/467 ,  H05K1/112 ,  H05K2201/0191

Abstract: A circuit board structure includes a circuit substrate having opposing first and second sides, a redistribution structure disposed at the first side, and a dielectric structure disposed at the second side. The circuit substrate includes a first circuit layer disposed at the first side and a second circuit layer disposed at the second side. The redistribution structure is electrically coupled to the circuit substrate and includes a first leveling dielectric layer covering the first circuit layer, a first thin-film dielectric layer disposed on the first leveling dielectric layer and having a material different from the first leveling dielectric layer, and a first redistributive layer disposed on the first thin-film dielectric layer and penetrating through the first thin-film dielectric layer and the first leveling dielectric layer to be in contact with the first circuit layer. The dielectric structure includes a second leveling dielectric layer disposed below the second circuit layer.

公开(公告)号：US20220408554A1

公开(公告)日：2022-12-22

申请号：US17674837

申请日：2022-02-18

Applicant: Unimicron Technology Corp.

Inventor： Tzyy-Jang Tseng ,  Chin-Sheng Wang ,  Ra-Min Tain

IPC: H05K1/02 ,  H05K1/18

Abstract: A circuit board structure includes a dielectric substrate, at least one embedded block, at least one electronic component, at least one first build-up circuit layer, and at least one second build-up circuit layer. The dielectric substrate includes a through cavity penetrating the dielectric substrate. The embedded block is fixed in the through cavity. The embedded block includes a first through hole and a second through hole. The electronic component is disposed in the through hole of the embedded block. The first build-up circuit layer is disposed on the top surface of the dielectric substrate and covers the embedded block. The second build-up circuit layer is disposed on the bottom surface of the dielectric substrate and covers the embedded block.

公开(公告)号：US11373927B2

公开(公告)日：2022-06-28

申请号：US16683266

申请日：2019-11-14

Applicant: Unimicron Technology Corp.

Inventor： Chin-Sheng Wang ,  Ra-Min Tain ,  Pei-Chang Huang

IPC: H01L23/367 ,  H01L23/42 ,  H01L23/498 ,  H01L23/18 ,  H01L23/467 ,  H01L23/14 ,  H01L21/48 ,  H01L23/00

Abstract: A package substrate includes a multilayer circuit structure, a gas-permeable structure, a heat conducting component, a first circuit layer, a second circuit layer and a build-up circuit structure. The gas-permeable structure and the heat conducting component are respectively disposed in a first and a second through holes of the multilayer circuit structure. The first and the second circuit layers are respectively disposed on an upper and a lower surfaces of the multilayer circuit structure and expose a first and a second sides of the gas-permeable structure. The build-up circuit structure is disposed on the first circuit layer and includes at least one patterned photo-imageable dielectric layer and at least one patterned circuit layer alternately stacked. The patterned circuit layer is electrically connected to the first circuit layer by at least one opening. The build-up circuit structure and the first circuit layer exposed by a receiving opening form a recess.

公开(公告)号：US20240414850A1

公开(公告)日：2024-12-12

申请号：US18404845

申请日：2024-01-04

Applicant: Unimicron Technology Corp.

Inventor： Chin-Sheng Wang ,  Ra-Min Tain ,  Chih-Kai Chan ,  Shih-Lian Cheng

IPC: H05K3/18 ,  H05K1/09 ,  H05K1/11 ,  H05K3/00 ,  H05K3/02 ,  H05K3/34

Abstract: A circuit board structure includes a core layer, at least one electroplating metal layer, at least one dielectric layer and at least one conductive metal layer. The core layer includes at least one dielectric portion and at least one metal portion. The electroplating metal layer is disposed on at least one of a first surface and a second surface of the core layer, exposing a portion of at least one of the first surface and the second surface and at least connecting the at least one metal part. The dielectric layer is disposed on at least one of the first surface and the second surface and on the electroplating metal layer. The dielectric layer has at least one opening exposing a portion of the electroplating metal layer. The conductive metal layer is disposed in the opening of the dielectric layer and is correspondingly connected to the electroplating metal layer.

公开(公告)号：US20230335466A1

公开(公告)日：2023-10-19

申请号：US18337438

申请日：2023-06-20

Applicant: Unimicron Technology Corp.

Inventor： Chin-Sheng Wang ,  Ra-Min Tain ,  Chih-Kai Chan ,  Jun-Ho Chen

IPC: H01L23/48 ,  H01L23/66 ,  H05K1/18 ,  H05K3/46 ,  H05K1/02

CPC classification number: H01L23/481 ,  H01L23/66 ,  H05K1/189 ,  H05K3/4691 ,  H05K3/4697 ,  H05K1/0216 ,  H01L2223/6677 ,  H05K2201/10098 ,  H05K2201/0154 ,  H05K2201/09809

Abstract: An electronic packaging structure including a first circuit structure, a second circuit structure and at least one electronic device is provided. The bottom side of the first circuit structure has at least one cavity. The first circuit structure is disposed on the second circuit structure. The first circuit structure and the second circuit structure are electrically connected to each other. The electronic device is disposed on the second circuit structure. The electronic device is disposed corresponding to the cavity of the first circuit structure.

公开(公告)号：US10714448B2

公开(公告)日：2020-07-14

申请号：US16203635

申请日：2018-11-29

Applicant: Unimicron Technology Corp.

Inventor： Chin-Sheng Wang ,  Ra-Min Tain

IPC: H01L23/00 ,  H01L23/498

Abstract: A chip module includes a body, a bump, and a first bonding layer. The bump is disposed on the body. The first bonding layer is disposed on the bump. The first bonding layers and the bump are made of the same conductive material and the first bonding layer is porous.

公开(公告)号：US20190296102A1

公开(公告)日：2019-09-26

申请号：US16145130

申请日：2018-09-27

Applicant: Unimicron Technology Corp.

Inventor： Ra-Min Tain ,  Chen-Hua Cheng ,  Chin-Sheng Wang ,  Chung-Chi Huang

IPC: H01L49/02 ,  H01L23/522

Abstract: An embedded component structure including a circuit board, an electronic component, a dielectric layer and a connection circuit layer and a manufacturing method thereof is provided. The circuit board has a through hole and includes a core layer, a first circuit layer, and a second circuit layer. The first circuit layer and the second circuit layer are disposed on the core layer. The through hole penetrates the first circuit layer and the core layer. The electronic component including a plurality of connection pads is disposed within the through hole where the dielectric layer is filled in. The connection circuit layer covers and contacts a first electrical connection surface of the first circuit layer and at least one of a second electrical connection surface of each of the connection pads.

公开(公告)号：US11715715B2

公开(公告)日：2023-08-01

申请号：US17200922

申请日：2021-03-15

Applicant: Unimicron Technology Corp.

Inventor： Tzyy-Jang Tseng ,  Ming-Ru Chen ,  Cheng-Chung Lo ,  Chin-Sheng Wang ,  Wen-Sen Tang

IPC: H01L23/00 ,  H01L25/075 ,  H01L27/12 ,  H01L33/62

CPC classification number: H01L24/13 ,  H01L24/03 ,  H01L24/05 ,  H01L24/11 ,  H01L25/0753 ,  H01L27/1214 ,  H01L33/62 ,  H01L2224/03312 ,  H01L2224/03552 ,  H01L2224/0401 ,  H01L2224/0518 ,  H01L2224/05082 ,  H01L2224/05124 ,  H01L2224/05139 ,  H01L2224/05144 ,  H01L2224/05147 ,  H01L2224/05164 ,  H01L2224/05166 ,  H01L2224/05171 ,  H01L2224/05193 ,  H01L2224/11464 ,  H01L2224/13013 ,  H01L2224/13014 ,  H01L2224/13111 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2924/12041 ,  H01L2924/1426 ,  H01L2933/0066

Abstract: A manufacturing method of a metal bump structure is provided. A driving base is provided. At least one pad and an insulating layer are formed on the driving base. The pad is formed on an arrangement surface of the driving base and has an upper surface. The insulating layer covers the arrangement surface of the driving base and the pad, and exposes a part of the upper surface of the pad. A patterned metal layer is formed on the upper surface of the pad exposed by the insulating layer, and extends to cover a part of the insulating layer. An electro-less plating process is performed to form at least one metal bump on the patterned metal layer. A first extension direction of the metal bump is perpendicular to a second extension direction of the driving base.