ELECTRONIC DEVICE AND DISPLAY METHOD
    21.
    发明申请
    ELECTRONIC DEVICE AND DISPLAY METHOD 审中-公开
    电子设备和显示方法

    公开(公告)号:US20130154798A1

    公开(公告)日:2013-06-20

    申请号:US13433757

    申请日:2012-03-29

    申请人: Chia-Hsiang Chen

    发明人: Chia-Hsiang Chen

    IPC分类号: G08B5/22

    CPC分类号: G01R31/3025

    摘要: An electronic device and a display method are provided. The electronic device includes a light emitting unit, an input switch, a power control unit, a register data storage unit and a signal control module. The input switch is configured to produce a switch signal and an address signal. The power control unit is configured to transmit power status data. The register data storage unit is configured to provide corresponding register data according to the address signal. The signal control module is electrically coupled to the light emitting unit, the power control unit, the register data storage unit and the input switch, and is configured to selectively receive the register data from the register data storage unit or the power status data from the power control unit according to the switch signal, and transmit the selected data to the light emitting unit.

    摘要翻译: 提供电子设备和显示方法。 电子设备包括发光单元,输入开关,功率控制单元,寄存器数据存储单元和信号控制模块。 输入开关被配置为产生开关信号和地址信号。 功率控制单元被配置为发送功率状态数据。 寄存器数据存储单元被配置为根据地址信号提供对应的寄存器数据。 信号控制模块电耦合到发光单元,功率控制单元,寄存器数据存储单元和输入开关,并且被配置为从寄存器数据存储单元或来自寄存器数据存储单元的电源状态数据选择性地接收寄存器数据 功率控制单元,并将选择的数据发送到发光单元。

    POWER SUPPLIER OF COMPUTER SYSTEM AND POWER SUPPLY METHOD THEREOF
    22.
    发明申请
    POWER SUPPLIER OF COMPUTER SYSTEM AND POWER SUPPLY METHOD THEREOF 审中-公开
    计算机系统的供电器及其电源方法

    公开(公告)号:US20130132752A1

    公开(公告)日:2013-05-23

    申请号:US13348141

    申请日:2012-01-11

    申请人: Chia-Hsiang Chen

    发明人: Chia-Hsiang Chen

    IPC分类号: G06F1/32

    CPC分类号: G06F1/3206 G06F21/81

    摘要: A power supplier of a computer system and a power supply method thereof are described. The power supply method includes the following steps, receiving a validation code when a computer system enters a working mode from a standby mode; determining whether the validation code is in accordance with a preset code; If the validation code is in accordance with the preset code, executing a power sequence control so that the power supplier generates a plurality of working voltages required by the computer system; and if the validation code is not in accordance with the preset code, powering off the computer system or keeping the computer system in the standby mode.

    摘要翻译: 描述了计算机系统的电源及其电源方法。 电源方法包括以下步骤:当计算机系统从待机模式进入工作模式时,接收验证码; 确定验证代码是否符合预设代码; 如果验证代码符合预设代码,则执行功率序列控制,使得供电器产生计算机系统所需的多个工作电压; 并且如果验证码不符合预设代码,则关闭计算机系统或保持计算机系统处于待机模式。

    POWER SUPPLY APPARATUS OF COMPUTER SYSTEM AND METHOD FOR CONTROLLING POWER SEQUENCE THEREOF
    23.
    发明申请
    POWER SUPPLY APPARATUS OF COMPUTER SYSTEM AND METHOD FOR CONTROLLING POWER SEQUENCE THEREOF 有权
    计算机系统的电源装置及其功率序列的控制方法

    公开(公告)号:US20130132741A1

    公开(公告)日:2013-05-23

    申请号:US13333672

    申请日:2011-12-21

    申请人: Chia-Hsiang Chen

    发明人: Chia-Hsiang Chen

    IPC分类号: G06F1/26

    CPC分类号: G06F1/26

    摘要: A power supply apparatus of a computer system and a method for controlling a power sequence thereof are provided. The power supply apparatus includes a power sequence module, a voltage supply unit, and a state recording module. The power sequence module provides voltage enable signals in turn according to first power-good signals. The voltage supply unit provides power voltages in turn according to the voltage enable signals and returns second power-good signals. Components in the computer system also provide third power-good signals when the components receive the power voltages. When one of the third power-good signals is converted from enabled to disabled, the state recording module delays a tolerance period according to the component corresponding to the third power-good signal, and converts the first power-good signal corresponding to the third power-good signal from enabled to disabled after the tolerance period is delayed.

    摘要翻译: 提供了一种计算机系统的电源装置及其功率序列的控制方法。 电源装置包括电源顺序模块,电压供给单元和状态记录模块。 功率序列模块根据第一功率良好信号依次提供电压使能信号。 电压供应单元根据电压使能信号依次提供电源电压并返回第二电源良好信号。 当组件接收电源电压时,计算机系统中的组件还提供第三个电源良好信号。 当第三功率良好信号中的一个从使能转换为禁用时,状态记录模块根据对应于第三功率良好信号的分量来延迟公差周期,并且将与第三功率对应的第一功率良好信号 在允许的时间段延迟后,从启用到禁用的良好信号。

    POWER REDUNDANT SYSTEM
    24.
    发明申请
    POWER REDUNDANT SYSTEM 有权
    电力冗余系统

    公开(公告)号:US20130127250A1

    公开(公告)日:2013-05-23

    申请号:US13337777

    申请日:2011-12-27

    申请人: Chia-Hsiang Chen

    发明人: Chia-Hsiang Chen

    IPC分类号: H02J4/00

    摘要: A power redundant system is provided. The power redundant system includes N first voltage generators, M second voltage generators, a switch unit and a control unit. A voltage of the i-th first voltage generator and a voltage of the j-th second voltage generator are equal. When a power good signal is enabled, the control unit enables a power control signal to control the switch unit so that an output of the switch unit is connected to an output of the j-th second voltage generator. When a power supply signal is enabled and the power good signal is disabled, the control unit disables the power control signal to control the switch unit so that the output of the switch unit is connected to an output of the i-th first voltage generator. Therefore, the first voltage generator and the second voltage generator of the system can backup each other.

    摘要翻译: 提供电源冗余系统。 功率冗余系统包括N个第一电压发生器,M个第二电压发生器,开关单元和控制单元。 第i个第一电压发生器的电压和第j个第二电压发生器的电压相等。 当使能电源良好信号时,控制单元启用电源控制信号来控制开关单元,使得开关单元的输出连接到第j个第二电压发生器的输出。 当电源信号被使能并且电源良好信号被禁用时,控制单元禁用电源控制信号来控制开关单元,使得开关单元的输出连接到第i个第一电压发生器的输出。 因此,系统的第一电压发生器和第二电压发生器可以彼此备份。

    THIN FILM TRANSISTOR AND FABRICATION METHOD THEREOF
    25.
    发明申请
    THIN FILM TRANSISTOR AND FABRICATION METHOD THEREOF 有权
    薄膜晶体管及其制造方法

    公开(公告)号:US20120267621A1

    公开(公告)日:2012-10-25

    申请号:US13163727

    申请日:2011-06-20

    IPC分类号: H01L29/786 H01L21/336

    CPC分类号: H01L29/4908 H01L29/7869

    摘要: A thin film transistor is provided. The thin film transistor includes a substrate, a gate, a gate insulating layer, a source and a drain, a channel layer, and first and second patterned passivation layers. The gate is disposed on the substrate. The gate insulating layer is disposed on the gate. The source and the drain are disposed on the gate insulating layer. The channel layer is disposed above or under the source and the drain, wherein a portion of the channel layer is exposed between the source and the drain. The first patterned passivation layer is disposed on the portion of the channel layer, wherein the first patterned passivation layer includes metal oxide, and the first patterned passivation layer has a thickness ranging from 50 angstroms to 300 angstroms. The second patterned passivation layer covers the first patterned passivation layer, the gate insulating layer, and the source and the drain.

    摘要翻译: 提供薄膜晶体管。 薄膜晶体管包括衬底,栅极,栅极绝缘层,源极和漏极,沟道层以及第一和第二图案化钝化层。 栅极设置在基板上。 栅极绝缘层设置在栅极上。 源极和漏极设置在栅极绝缘层上。 沟道层设置在源极和漏极之上或之下,其中沟道层的一部分暴露在源极和漏极之间。 第一图案化钝化层设置在沟道层的部分上,其中第一图案化钝化层包括金属氧化物,第一图案化钝化层的厚度范围为50埃至300埃。 第二图案化钝化层覆盖第一图案化钝化层,栅极绝缘层以及源极和漏极。

    Hinge with a positioning and limiting assembly

    公开(公告)号:US20070169316A1

    公开(公告)日:2007-07-26

    申请号:US11336750

    申请日:2006-01-20

    IPC分类号: E05D3/10

    摘要: A hinge has a first bracket, a first pivot pin, a second pivot pin, a second bracket and a positioning and limiting assembly. The first pivot pin is on the first bracket. The second pivot pin is mounted rotatably on the first pivot pin and has a mounting recess. The second bracket is mounted pivotally on the second pivot pin. The positioning and limiting assembly is mounted in the mounting recess in the second pivot pin and has a seat, a positioning disk and limiting disk. The seat is mounted in the mounting recess. The positioning disk is mounted to the first pivot pin and detachably engage the seat. The limiting disk is mounted to the first pivot pin and selectively abuts seat. The positioning and limiting assembly in the mounting recess makes the hinge compact and easily apply to portable devices such as cell phones and digital cameras.

    Hinge with a positioning and limiting assembly
    27.
    发明申请
    Hinge with a positioning and limiting assembly 审中-公开
    铰链与定位和限制组装

    公开(公告)号:US20070169315A1

    公开(公告)日:2007-07-26

    申请号:US11336745

    申请日:2006-01-20

    IPC分类号: E05D3/10

    摘要: A hinge has a first bracket, a first pivot pin, a second pivot pin, a second bracket and a positioning and limiting assembly. The first pivot pin is on the first bracket. The second pivot pin is mounted rotatably on the first pivot pin and has a mounting recess. The second bracket is mounted pivotally on the second pivot pin. The positioning and limiting assembly is mounted in the mounting recess in the second pivot pin and has a seat, a positioning disk and limiting disk. The seat is mounted in the mounting recess. The positioning disk is mounted to the first pivot pin and detachably engage the seat. The limiting disk is mounted to the first pivot pin and selectively abuts seat. The positioning and limiting assembly in the mounting recess makes the hinge compact and easily apply to portable devices such as cell phones and digital cameras.

    摘要翻译: 铰链具有第一支架,第一枢轴销,第二枢转销,第二支架和定位和限制组件。 第一个枢轴销在第一个支架上。 第二枢轴销可旋转地安装在第一枢轴销上并具有安装凹槽。 第二支架枢转地安装在第二枢轴销上。 定位和限制组件安装在第二枢轴销的安装凹槽中,并且具有座椅,定位盘和限制盘。 座椅安装在安装凹槽中。 定位盘被安装到第一枢轴销上并可拆卸地接合座椅。 限位盘安装到第一枢轴销并且选择性地邻接座椅。 安装凹槽中的定位和限制组件使得铰链紧凑并且容易地应用于诸如手机和数码相机的便携式设备。

    Power supply apparatus of computer system and method for controlling power sequence thereof
    29.
    发明授权
    Power supply apparatus of computer system and method for controlling power sequence thereof 有权
    计算机系统的电源装置及其功率序列的控制方法

    公开(公告)号:US08909952B2

    公开(公告)日:2014-12-09

    申请号:US13333672

    申请日:2011-12-21

    申请人: Chia-Hsiang Chen

    发明人: Chia-Hsiang Chen

    IPC分类号: G06F1/26 G06F1/30

    CPC分类号: G06F1/26

    摘要: A power supply apparatus of a computer system and a method for controlling a power sequence thereof are provided. The power supply apparatus includes a power sequence module, a voltage supply unit, and a state recording module. The power sequence module provides voltage enable signals in turn according to first power-good signals. The voltage supply unit provides power voltages in turn according to the voltage enable signals and returns second power-good signals. Components in the computer system also provide third power-good signals when the components receive the power voltages. When one of the third power-good signals is converted from enabled to disabled, the state recording module delays a tolerance period according to the component corresponding to the third power-good signal, and converts the first power-good signal corresponding to the third power-good signal from enabled to disabled after the tolerance period is delayed.

    摘要翻译: 提供了一种计算机系统的电源装置及其功率序列的控制方法。 电源装置包括电源顺序模块,电压供给单元和状态记录模块。 功率序列模块根据第一功率良好信号依次提供电压使能信号。 电压供应单元根据电压使能信号依次提供电源电压并返回第二电源良好信号。 当组件接收电源电压时,计算机系统中的组件还提供第三个电源良好信号。 当第三功率良好信号中的一个从使能转换为禁用时,状态记录模块根据对应于第三功率良好信号的分量来延迟公差周期,并且将与第三功率对应的第一功率良好信号 在允许的时间段延迟后,从启用到禁用的良好信号。

    System error analysis method and the device using the same
    30.
    发明授权
    System error analysis method and the device using the same 有权
    系统错误分析方法和使用该设备的设备

    公开(公告)号:US08726089B2

    公开(公告)日:2014-05-13

    申请号:US13433556

    申请日:2012-03-29

    申请人: Chia-Hsiang Chen

    发明人: Chia-Hsiang Chen

    IPC分类号: G06F11/00

    CPC分类号: G06F11/008 G06F11/079

    摘要: A system error analysis device which includes a top unit and a storage unit coupled to the top module is mentioned. The storage unit is configured to store each of the input data, each of the output data and each of the bus data transmitted by the top unit. When receiving an interrupting signal, the system error analysis device outputs the input data, the output data and the bus data stored as soon as the interrupting signal is received and the input data, the output data and the bus data stored before the receiving of the interrupting signal. Accordingly, by comparing and analyzing the data output by system error analysis device, the system employing the system error analysis device is able to obtain the reason of the generation of the interrupting signal.

    摘要翻译: 提及一种包括顶部单元和耦合到顶部模块的存储单元的系统误差分析装置。 存储单元被配置为存储每个输入数据,每个输出数据和由顶部单元发送的每个总线数据。 当接收到中断信号时,系统误差分析装置在接收到中断信号之后输出存储的输入数据,输出数据和总线数据,并且在接收到中断信号之前存储输入数据,输出数据和总线数据 中断信号。 因此,通过比较和分析由系统误差分析装置输出的数据,采用系统误差分析装置的系统能够获得产生中断信号的原因。