MOTHERBOARD HAVING TIME DELAY CIRCUIT FOR DELAYING PSON SIGNAL
    21.
    发明申请
    MOTHERBOARD HAVING TIME DELAY CIRCUIT FOR DELAYING PSON SIGNAL 有权
    具有时延延迟延迟电路信号的母板

    公开(公告)号:US20120179930A1

    公开(公告)日:2012-07-12

    申请号:US13049909

    申请日:2011-03-17

    IPC分类号: G06F1/26

    CPC分类号: G06F1/24 G06F1/305

    摘要: A motherboard includes a motherboard power supply connector and a time delay circuit. The motherboard power supply connector connects a power supply unit. The motherboard power supply connector has a power supply on pin and a power good pin. The power good pin is configured for receiving a power good signal from the power supply unit. The time delay circuit has an input terminal and an output terminal. The input terminal is configured for receiving a power supply on signal. The output terminal is connected to the power supply on pin and is configured for sending the power supply on signal to the power supply on pin after a time delay determined by the time delay circuit.

    摘要翻译: 主板包括主板电源连接器和延时电路。 主板电源连接器连接电源单元。 主板电源连接器有一个引脚电源和一个电源良好的引脚。 电源良好引脚配置为从电源单元接收电源良好信号。 延时电路具有输入端和输出端。 输入端子被配置为接收电源接通信号。 输出端子连接到引脚上的电源,并配置为在由延时电路确定的时间延迟后,将电源接通信号发送到引脚上的电源。

    DRIVING VOLTAGE ADJUSTING CIRCUIT
    22.
    发明申请
    DRIVING VOLTAGE ADJUSTING CIRCUIT 失效
    驱动电压调节电路

    公开(公告)号:US20120169312A1

    公开(公告)日:2012-07-05

    申请号:US13053408

    申请日:2011-03-22

    IPC分类号: G05F1/10

    CPC分类号: G05F1/575

    摘要: A driving voltage adjusting circuit includes a digital rheostat, a control chip, a low dropout regulating circuit, and a driving circuit. The control chip is connected with the digital rheostat, and configured for adjusting the resistance of the digital rheostat. The low dropout regulating circuit is connected with the digital rheostat and outputs an output voltage according to the resistance of the digital rheostat. The driving circuit comprising a number of switch elements connected with each other and a driver configured for driving the switch elements, each of the switch elements comprising a first terminal, a second terminal, and a control terminal configured for controlling connection and disconnection of the first terminal and the second terminal; the first terminal and the second terminal connected with the control chip, the driver is connected with the low dropout regulating circuit and output an driving voltage to the control terminal.

    摘要翻译: 驱动电压调节电路包括数字变阻器,控制芯片,低压差调节电路和驱动电路。 控制芯片与数字变阻器连接,并配置用于调节数字变阻器的电阻。 低压差调节电路与数字变阻器相连,并根据数字变阻器的电阻输出一个输出电压。 所述驱动电路包括彼此连接的多个开关元件和被配置为驱动所述开关元件的驱动器,所述开关元件中的每一个包括第一端子,第二端子和控制端子,所述第一端子,第二端子和控制端子被配置为用于控制所述开关元件的连接和断开 终端和第二终端; 与控制芯片连接的第一端子和第二端子,驱动器与低压差调节电路连接,并向控制端子输出驱动电压。

    BUCK CONVERTER
    23.
    发明申请
    BUCK CONVERTER 审中-公开
    BUCK转换器

    公开(公告)号:US20120161729A1

    公开(公告)日:2012-06-28

    申请号:US13100962

    申请日:2011-05-04

    IPC分类号: G05F1/618

    摘要: A buck converter includes an input unit, an inductor, and a filter capacitor. The input unit has an input node connected to a power source and an intermediate node connected to an output node through the inductor. The filter capacitor is coupled between the output node and ground. A first RC integral circuit is in parallel connection with the first inductor, a voltage acquired unit is in parallel connection with the capacitor of the RC integral circuit for obtaining a voltage U1 between the two terminals of the second capacitor. A control unit is coupled to the first voltage acquired unit for receiving the voltage U1 of the capacitor.

    摘要翻译: 降压转换器包括输入单元,电感器和滤波电容器。 输入单元具有连接到电源的输入节点和通过电感器连接到输出节点的中间节点。 滤波电容器耦合在输出节点和地之间。 第一RC积分电路与第一电感并联,电压获取单元与RC积分电路的电容并联连接,以获得第二电容器的两个端子之间的电压U1。 控制单元耦合到第一电压获取单元,用于接收电容器的电压U1。

    BUCK CONVERTER
    24.
    发明申请
    BUCK CONVERTER 失效
    BUCK转换器

    公开(公告)号:US20120126767A1

    公开(公告)日:2012-05-24

    申请号:US13092217

    申请日:2011-04-22

    IPC分类号: G05F1/618

    摘要: A buck converter includes a first electrical switch and a second electrical switch connected in series, a PWM module coupled to the gate of the first electrical switch through a first adjustable resistance module and coupled to the gate of the second electrical switch through a second adjustable resistance module, a filter circuit coupled between the connecting node of the two different electrical switches and an output node, and a control module for adjusting values of the first adjustable resistance module and the second adjustable resistance module and acquiring a voltage value from the connecting node.

    摘要翻译: 降压转换器包括串联连接的第一电开关和第二电开关,PWM模块通过第一可调电阻模块耦合到第一电开关的栅极,并通过第二可调电阻耦合到第二电开关的栅极 模块,耦合在两个不同电气开关的连接节点和输出节点之间的滤波器电路,以及用于调整第一可调电阻模块和第二可调电阻模块的值并从连接节点获取电压值的控制模块。

    SNUBBER CIRCUIT FOR BUCK CONVERTER
    25.
    发明申请
    SNUBBER CIRCUIT FOR BUCK CONVERTER 失效
    用于转矩转换器的SNUBBER电路

    公开(公告)号:US20120112715A1

    公开(公告)日:2012-05-10

    申请号:US13031621

    申请日:2011-02-22

    IPC分类号: G05F1/10 H02H9/00

    CPC分类号: H02M3/155 H02M2001/344

    摘要: A snubber circuit for decreasing a voltage spike of a buck converter includes a resistor unit, a capacitor unit, a detecting unit, and a control unit. The resistor unit provides multiple groups of resistance values. The capacitor unit provides multiple groups of capacitance values. The detecting unit detects voltage spikes of the buck converter corresponding to each group of resistance values and capacitance values. The control unit selects each group of resistance and capacitance to respectively connect to the buck converter and determines a group of resistance and capacitance corresponding to a lowest voltage spike by comparing the detected voltage spikes with each other.

    摘要翻译: 用于降低降压转换器的电压尖峰的缓冲电路包括电阻单元,电容器单元,检测单元和控制单元。 电阻单元提供多组电阻值。 电容器单元提供多组电容值。 检测单元检测对应于每组电阻值和电容值的降压转换器的电压尖峰。 控制单元选择每组电阻和电容分别连接到降压转换器,并通过将检测到的电压尖峰相互比较来确定与最低电压尖峰相对应的一组电阻和电容。

    CAPACITANCE MEASUREMENT CIRCUIT
    26.
    发明申请
    CAPACITANCE MEASUREMENT CIRCUIT 审中-公开
    电容测量电路

    公开(公告)号:US20130116956A1

    公开(公告)日:2013-05-09

    申请号:US13326232

    申请日:2011-12-14

    IPC分类号: G06F19/00 G01R27/26

    CPC分类号: G01R27/2605

    摘要: A capacitance measurement circuit includes a charge module to charge a capacitor, a discharge module to hold the capacitor discharge at a constant current, and a control module. The control module includes a timer, a detecting sub-module, a trigger sub-module, and a computing sub-module. The detecting sub-module detects whether the capacitance is fully charged and detects voltages V and discharge current I when the capacitor discharges. The trigger sub-module triggers the charge module to stop charging the capacitor and triggers the timer starts to time a preset discharge time once the capacitor is fully charged. The computing sub-module computes any output voltage differences during the discharge time, and further computes the capacitance value of the capacitor.

    摘要翻译: 电容测量电路包括对电容器充电的充电模块,以恒定电流保持电容器放电的放电模块以及控制模块。 控制模块包括定时器,检测子模块,触发子模块和计算子模块。 检测子模块检测电容是否充满电,并且在电容器放电时检测电压V和放电电流I. 触发子模块触发充电模块停止对电容器充电,并且一旦电容器充满电就触发定时器开始计时放电时间。 计算子模块计算放电时间内的任何输出电压差,并进一步计算电容器的电容值。

    MONITORING DEVICE AND METHOD FOR MONITORING POWER PARAMETERS OF MEMORY BANK OF COMPUTING DEVICE
    27.
    发明申请
    MONITORING DEVICE AND METHOD FOR MONITORING POWER PARAMETERS OF MEMORY BANK OF COMPUTING DEVICE 审中-公开
    用于监视计算机存储器的电源参数的监视装置和方法

    公开(公告)号:US20130091374A1

    公开(公告)日:2013-04-11

    申请号:US13626964

    申请日:2012-09-26

    IPC分类号: G06F11/30 G06F1/26

    摘要: A monitored device is used to monitor power parameters of a memory bank of a computing device. The monitoring device includes a main circuit board, a connector, and a parameter monitoring device. The parameter monitoring device comprises an acquisition unit, a processing unit, and a display unit. The main circuit board is connected to a power supply and providing power signals to one or more power pins of the memory bank. The connector is connected between the main circuit board and the memory bank. The acquisition unit acquires a voltage passing through each power pin of the memory bank when power is supplied to the memory bank. The processing unit processes the voltage acquired from each of the one or more power pins to obtain power parameters of the memory bank. The display unit displays the power parameters of the memory bank.

    摘要翻译: 监视的设备用于监视计算设备的存储体的功率参数。 监视装置包括主电路板,连接器和参数监视装置。 参数监视装置包括采集单元,处理单元和显示单元。 主电路板连接到电源,并向存储体的一个或多个电源引脚提供电源信号。 连接器连接在主电路板和存储体之间。 当向存储体供电时,采集单元获取通过存储体的每个电源引脚的电压。 处理单元处理从一个或多个电源引脚中的每一个获取的电压以获得存储体的功率参数。 显示单元显示存储体的功率参数。

    DETECTION DEVICE
    28.
    发明申请
    DETECTION DEVICE 失效
    检测装置

    公开(公告)号:US20130031280A1

    公开(公告)日:2013-01-31

    申请号:US13329224

    申请日:2011-12-17

    IPC分类号: G06F3/00

    CPC分类号: G06F1/28

    摘要: A detection device to detect a power serving time of a super capacitor for a power-disconnected storage card and an amount of the data packets capable of being stored during the detected serving time is provided. The power-disconnected storage card includes a memory. The detection device includes a power supply unit, the super capacitor, a controller, a storage unit, and a detection unit. The storage unit stores the data packets. The detection unit includes a charge notification module, a data notification module and a time module. The charge notification module generates a first notification signal to the time module. The data notification module generates a second notification signal to the time module when the storage unit transmits the data packet to the memory. The time module records time when the memory completely store the data packet according to the first notification signal and the second notification signal.

    摘要翻译: 提供了检测用于断电存储卡的超级电容器的功率服务时间的检测装置以及在检测到的服务时间期间能够存储的数据分组的量。 电源断开的存储卡包括一个存储器。 检测装置包括电源单元,超级电容器,控制器,存储单元和检测单元。 存储单元存储数据分组。 检测单元包括充电通知模块,数据通知模块和时间模块。 收费通知模块向时间模块生成第一通知信号。 当存储单元将数据包发送到存储器时,数据通知模块生成第二通知信号给时间模块。 时间模块记录存储器根据第一通知信号和第二通知信号完全存储数据包的时间。

    POWER CIRCUIT FOR DATA STORAGE DEVICE
    29.
    发明申请
    POWER CIRCUIT FOR DATA STORAGE DEVICE 有权
    数据存储设备的电源电路

    公开(公告)号:US20120311352A1

    公开(公告)日:2012-12-06

    申请号:US13169526

    申请日:2011-06-27

    IPC分类号: G06F1/26

    摘要: A power circuit which is applicable to a data storage device. A boost circuit receives a first voltage and converts it to a second voltage. A charging and discharging circuit receives the second voltage and charges a charging capacitor. As long as a voltage detecting circuit detects that the second voltage exists, it outputs a first selection signal. When the voltage detecting circuit detects that the second voltage does not exist, it outputs a second selection signal and also outputs a signal to the charging and discharging circuit, to release a stored voltage. A voltage selection circuit will output the second voltage according to the first selection signal, or will output the stored voltage from the charging capacitor according to the second selection signal. Buck circuits convert the second voltage or the stored voltage to the different voltages required by a control chip of the data storage device.

    摘要翻译: 适用于数据存储装置的电源电路。 升压电路接收第一电压并将其转换为第二电压。 充电和放电电路接收第二电压并对充电电容器充电。 只要电压检测电路检测到第二电压存在,就输出第一选择信号。 当电压检测电路检测到第二电压不存在时,它输出第二选择信号,并且还向充电和放电电路输出信号以释放存储的电压。 电压选择电路将根据第一选择信号输出第二电压,或者根据第二选择信号从充电电容器输出存储的电压。 降压电路将第二电压或存储电压转换为数据存储设备的控制芯片所需的不同电压。

    RESISTANCE DETERMINING SYSTEM AND METHOD
    30.
    发明申请
    RESISTANCE DETERMINING SYSTEM AND METHOD 审中-公开
    电阻测定系统和方法

    公开(公告)号:US20120262195A1

    公开(公告)日:2012-10-18

    申请号:US13283604

    申请日:2011-10-28

    IPC分类号: G01R27/08

    CPC分类号: G06F1/26

    摘要: A resistance determining system is used to determine an offsetting resistance of a mainboard to establish a predetermined offset voltage. The system includes an input equipment, a single-chip, and a resistor. The input equipment sets a predetermined standard voltage of the mainboard. The resistor supplies the mainboard with various resistances, to adjust real output voltage of the mainboard. The single-chip monitors the real output voltage of the mainboard, and adjusts the resistance of the resistor until the difference between the real output voltage and the predetermined standard voltage is equal to a predetermined offset voltage.

    摘要翻译: 电阻确定系统用于确定主板的抵消电阻以建立预定的偏移电压。 该系统包括输入设备,单片机和电阻器。 输入设备设定主板的预定标准电压。 电阻为主板提供各种电阻,以调整主板的实际输出电压。 单芯片监视主板的实际输出电压,并调整电阻器的电阻,直到实际输出电压和预定标准电压之间的差值等于预定的偏移电压。