公开(公告)号：US20120092578A1

公开(公告)日：2012-04-19

申请号：US13337160

申请日：2011-12-26

Applicant: Maw-Song Chen ,  Kuo-Yu Huang ,  Te-Chun Huang

Inventor： Maw-Song Chen ,  Kuo-Yu Huang ,  Te-Chun Huang

IPC: G02F1/133 ,  G02F1/136

CPC classification number: G02F1/13394 ,  G02F1/13454 ,  G02F2001/133388

Abstract: A driving circuit and a common electrode are located within a sealant region of the first substrate, wherein the driving circuit includes switch devices and turn-line structures. The common electrode is located within the sealant region of the first substrate. The planar layer is located on the first substrate, wherein the thickness of the planar layer at the turn-line structure of the driving circuit is less than the thicknesses of other portions. The conductive layer is located on the planar layer. A second substrate having an electrode thereon is disposed opposite to the first substrate. A liquid crystal layer is located within the display region between the first substrate and the second substrate. A sealant is located within the sealant region between the first substrate and the second substrate, and conductive balls are distributed in the sealant.

Abstract translation: 驱动电路和公共电极位于第一基板的密封剂区域内，其中驱动电路包括开关装置和开关线结构。 公共电极位于第一基板的密封剂区域内。 平面层位于第一基板上，其中驱动电路的转线结构处的平面层的厚度小于其它部分的厚度。 导电层位于平面层上。 其上具有电极的第二基板设置成与第一基板相对。 液晶层位于第一基板和第二基板之间的显示区域内。 密封剂位于第一基板和第二基板之间的密封剂区域内，导电球分布在密封剂中。

公开(公告)号：US20110263053A1

公开(公告)日：2011-10-27

申请号：US13174795

申请日：2011-07-01

Applicant: Hsiang-Lin Lin ,  Ching-Yu Tsai ,  Yi-Sheng Cheng ,  Kuo-Yu Huang

Inventor： Hsiang-Lin Lin ,  Ching-Yu Tsai ,  Yi-Sheng Cheng ,  Kuo-Yu Huang

IPC: H01L33/00

CPC classification number: H01L27/1288 ,  G09G3/3648 ,  G09G2300/0465 ,  H01L27/124 ,  H01L27/1255 ,  H01L29/0657 ,  H01L29/41733 ,  H01L29/42384

Abstract: A pixel structure including a scan line, a data line, an active device, a shielding electrode, and a pixel electrode is provided on a substrate. The data line includes an upper conductive wire and a bottom conductive wire. The upper conductive wire is disposed over and across the scan line. The bottom conductive wire is electrically connected to the upper conductive wire. The active device is electrically connected to the scan line and the upper conductive wire. The shielding electrode is disposed over the bottom conductive wire. The pixel electrode disposed over the shielding electrode is electrically connected to the active device. In addition, parts of the pixel electrode and parts of the shielding electrode form a storage capacitor.

Abstract translation: 在基板上设置包括扫描线，数据线，有源器件，屏蔽电极和像素电极的像素结构。 数据线包括上导线和底导线。 上导线设置在扫描线上方并穿过扫描线。 底部导线与上导电线电连接。 有源器件电连接到扫描线和上导电线。 屏蔽电极设置在底部导线上。 设置在屏蔽电极上方的像素电极与有源器件电连接。 此外，像素电极的一部分和屏蔽电极的一部分形成存储电容器。

公开(公告)号：US20100149473A1

公开(公告)日：2010-06-17

申请号：US12371927

申请日：2009-02-17

Applicant: Tsai-Hua Guo ,  Maw-Song Chen ,  Kuo-Yu Huang ,  Te-Chun Huang

Inventor： Tsai-Hua Guo ,  Maw-Song Chen ,  Kuo-Yu Huang ,  Te-Chun Huang

IPC: G02F1/1333 ,  H01L21/768

CPC classification number: G02F1/1345 ,  H01L27/124 ,  H01L27/1248

Abstract: A pixel array includes a substrate, scan lines, data lines, active devices, first pads, second pads, first wires, second wires, an insulating layer, an organic planarization layer, first pad electrodes, second pad electrodes and pixel electrodes. The substrate has a display area and a non-display area. The scan lines and the data lines are disposed in the display area. The active devices are disposed in the display area and electrically connected to the scan lines and the data lines. The first and second pads are disposed in the non-display area. The first and second wires are disposed in the non-display area and respectively connected to the first and second pads. The organic planarization layer covers the insulating layer. The first and second pad electrodes are disposed on the organic planarization layer in the non-display area. The pixel electrodes are disposed on the organic planarization layer in the display area.

Abstract translation: 像素阵列包括基板，扫描线，数据线，有源器件，第一焊盘，第二焊盘，第一布线，第二布线，绝缘层，有机平坦化层，第一焊盘电极，第二焊盘电极和像素电极。 基板具有显示区域和非显示区域。 扫描线和数据线被布置在显示区域中。 有源器件设置在显示区域中并电连接到扫描线和数据线。 第一和第二焊盘设置在非显示区域中。 第一和第二导线设置在非显示区域中并且分别连接到第一和第二焊盘。 有机平坦化层覆盖绝缘层。 第一和第二焊盘电极设置在非显示区域中的有机平坦化层上。 像素电极设置在显示区域中的有机平坦化层上。

公开(公告)号：US20090167975A1

公开(公告)日：2009-07-02

申请号：US12274775

申请日：2008-11-20

Applicant: Liu-Chung Lee ,  Hsiang-Lin Lin ,  Kuo-Yu Huang

Inventor： Liu-Chung Lee ,  Hsiang-Lin Lin ,  Kuo-Yu Huang

IPC: G02F1/136 ,  H01L21/336

CPC classification number: G02F1/13458 ,  G02F1/136227 ,  G02F2001/136218 ,  H01L27/124 ,  H01L27/1255 ,  H01L27/1288

Abstract: A liquid crystal display unit structure and the manufacturing method thereof are provided. The method comprises the following steps: forming a patterned first metal layer with a first data line segment and a lower gate pad on a substrate; forming a patterned dielectric layer covering the first data line and the lower gate pad having a plurality of first openings and a second opening therein, forming a patterned second metal layer including a common line, a second data line segment and a upper gate pad, wherein the upper gate pad is electrically connected to the lower gate pad through the first openings, and the second data line segment is electrically connected to the first data line segment through the first openings; finally forming a patterned passivation layer and a patterned transparent conductive layer.

Abstract translation: 提供了一种液晶显示单元结构及其制造方法。 该方法包括以下步骤：在衬底上形成具有第一数据线段和下栅极焊盘的图案化第一金属层; 形成覆盖所述第一数据线的图案化电介质层和所述下栅极焊盘，其中具有多个第一开口和第二开口，形成包括公共线，第二数据线段和上栅极焊盘的图案化第二金属层，其中 所述上栅极焊盘通过所述第一开口电连接到所述下栅极焊盘，并且所述第二数据线段通过所述第一开口电连接到所述第一数据线段; 最后形成图案化的钝化层和图案化的透明导电层。

公开(公告)号：US09239502B2

公开(公告)日：2016-01-19

申请号：US13541757

申请日：2012-07-04

Applicant: Te-Chun Huang ,  Hsiang-Lin Lin ,  Kuo-Yu Huang

Inventor： Te-Chun Huang ,  Hsiang-Lin Lin ,  Kuo-Yu Huang

IPC: G02F1/1343 ,  G02F1/1345 ,  G02F1/1333 ,  H01L27/12 ,  G02F1/1362 ,  G02F1/136

CPC classification number: H01L27/127 ,  G02F1/133345 ,  G02F1/13458 ,  G02F1/136227 ,  G02F1/136286 ,  G02F2001/134318 ,  G02F2001/13606 ,  G02F2001/136218 ,  G02F2001/13629 ,  G02F2001/136295 ,  H01L27/124 ,  H01L27/1255 ,  H01L27/1288

Abstract: A pixel structure and a manufacturing method thereof are provided. The pixel structure includes a substrate, a scan line, a data line, a first insulating layer, an active device, a second insulating layer, a common electrode and a first pixel electrode. The data line crossed to the scan line is disposed on the substrate and includes a linear transmitting part and a cross-line transmitting part. The first insulating layer covering the scan line and the linear transmitting part is disposed between the scan line and the cross-line transmitting part. The active device, including a gate, an oxide channel, a source and a drain, is connected to the scan line and the data line. The second insulating layer is disposed on the oxide channel and the linear transmitting part. The common electrode is disposed above the linear transmitting part. The first pixel electrode is connected to the drain.

Abstract translation: 提供像素结构及其制造方法。 像素结构包括基板，扫描线，数据线，第一绝缘层，有源器件，第二绝缘层，公共电极和第一像素电极。 与扫描线交叉的数据线设置在基板上，并且包括线性透射部分和交叉线传输部分。 覆盖扫描线的第一绝缘层和线性透射部分设置在扫描线和交叉线传输部分之间。 包括栅极，氧化物通道，源极和漏极的有源器件连接到扫描线和数据线。 第二绝缘层设置在氧化物通道和线性透射部分上。 公共电极设置在线状发送部的上方。 第一像素电极连接到漏极。

公开(公告)号：US08957420B2

公开(公告)日：2015-02-17

申请号：US13167746

申请日：2011-06-24

Applicant: Ze-Yu Yen ,  Ke-Chih Chang ,  Kuo-Yu Huang ,  En-Yung Lin

Inventor： Ze-Yu Yen ,  Ke-Chih Chang ,  Kuo-Yu Huang ,  En-Yung Lin

IPC: H01L29/41 ,  H01L27/12 ,  H01L29/417

CPC classification number: H01L27/124 ,  H01L27/1248 ,  H01L29/41733

Abstract: A thin film transistor (TFT) array substrate with few processing steps and simple structure is provided, wherein merely two patterned metal layers are required and a patterned planarization layer is adopted to separate the two patterned metal layers from each other and thereby reduce power loading. In addition, the patterned planarization layer has slots to form height differences so as to separate scan lines from common electrodes to further reduce the power loading.

Abstract translation: 提供了具有很少处理步骤和简单结构的薄膜晶体管（TFT）阵列基板，其中仅需要两个图案化的金属层，并且采用图案化平坦化层将两个图案化的金属层彼此分离，从而减少功率负载。 此外，图案化平坦化层具有形成高度差的槽，以便将扫描线与公共电极分开，以进一步减小功率负载。

公开(公告)号：US08553193B2

公开(公告)日：2013-10-08

申请号：US12909831

申请日：2010-10-22

Applicant: Ke-Chih Chang ,  Kuo-Yu Huang ,  Yu-Cheng Chen ,  Tsan-Chun Wang

Inventor： Ke-Chih Chang ,  Kuo-Yu Huang ,  Yu-Cheng Chen ,  Tsan-Chun Wang

IPC: G02F1/1343

CPC classification number: G02F1/13624 ,  G02F2001/13606

Abstract: A pixel structure includes a first and a second scan lines, a data line, a first insulating layer covering the first and the second scan lines and a portion of the data line and having a recess, a second insulating layer covering the first insulating layer, a capacitor electrode line covering the data line and the recess, a third insulating layer on the capacitor electrode line, a first active device electrically connected to the second scan line and the data line, a second active device electrically connected to the first active device and the first scan line, and a first and a second pixel electrodes electrically connected to the first and the second active devices, respectively. The portion of the data line and the first and the second scan lines are in the same layer. The recess is located at two sides of the portion of the data line.

Abstract translation: 像素结构包括第一和第二扫描线，数据线，覆盖第一和第二扫描线的第一绝缘层和数据线的一部分并具有凹部，覆盖第一绝缘层的第二绝缘层， 覆盖数据线和凹部的电容器电极线，电容器电极线上的第三绝缘层，与第二扫描线和数据线电连接的第一有源器件，与第一有源器件电连接的第二有源器件， 第一扫描线以及分别电连接到第一和第二有源器件的第一和第二像素电极。 数据线和第一和第二扫描线的部分在同一层中。 凹槽位于数据线部分的两侧。

公开(公告)号：US20120218489A1

公开(公告)日：2012-08-30

申请号：US13466195

申请日：2012-05-08

Applicant: Liu-Chung Lee ,  Hsiang-Lin Lin ,  Kuo-Yu Huang

Inventor： Liu-Chung Lee ,  Hsiang-Lin Lin ,  Kuo-Yu Huang

IPC: G02F1/136

CPC classification number: G02F1/13458 ,  G02F1/136227 ,  G02F2001/136218 ,  H01L27/124 ,  H01L27/1255 ,  H01L27/1288

Abstract: A liquid crystal display unit structure and the manufacturing method thereof are provided. The liquid crystal display unit structure comprises a patterned first metal layer with a first data line segment and a gate line on a substrate; a patterned dielectric layer covering the first data line and the gate line having a plurality of first openings and a second opening therein, a patterned etch stop layer having a first portion located above the first data line segment and a second portion; a patterned second metal layer including a common electrode line, a second data line segment, a source electrode and a drain electrode, wherein the first portion of the patterned etch stop layer is between the first data line segment and the common line; a patterned passivation layer and a patterned transparent conductive layer.

Abstract translation: 提供了一种液晶显示单元结构及其制造方法。 液晶显示单元结构包括在基板上具有第一数据线段和栅极线的图案化第一金属层; 覆盖第一数据线的图案化介电层和具有多个第一开口和第二开口的栅极线，具有位于第一数据线段上方的第一部分的图案化蚀刻停止层和第二部分; 图案化的第二金属层，包括公共电极线，第二数据线段，源电极和漏电极，其中图案化蚀刻停止层的第一部分在第一数据线段和公共线之间; 图案化钝化层和图案化的透明导电层。

公开(公告)号：US08237904B2

公开(公告)日：2012-08-07

申请号：US13337160

申请日：2011-12-26

Applicant: Maw-Song Chen ,  Kuo-Yu Huang ,  Te-Chun Huang

Inventor： Maw-Song Chen ,  Kuo-Yu Huang ,  Te-Chun Huang

IPC: G02F1/1345 ,  G09G3/36 ,  H01L29/04

CPC classification number: G02F1/13394 ,  G02F1/13454 ,  G02F2001/133388

Abstract: A driving circuit and a common electrode are located within a sealant region of the first substrate, wherein the driving circuit includes switch devices and turn-line structures. The common electrode is located within the sealant region of the first substrate. The planar layer is located on the first substrate, wherein the thickness of the planar layer at the turn-line structure of the driving circuit is less than the thicknesses of other portions. The conductive layer is located on the planar layer. A second substrate having an electrode thereon is disposed opposite to the first substrate. A liquid crystal layer is located within the display region between the first substrate and the second substrate. A sealant is located within the sealant region between the first substrate and the second substrate, and conductive balls are distributed in the sealant.

Abstract translation: 驱动电路和公共电极位于第一基板的密封剂区域内，其中驱动电路包括开关装置和开关线结构。 公共电极位于第一基板的密封剂区域内。 平面层位于第一基板上，其中驱动电路的转线结构处的平面层的厚度小于其它部分的厚度。 导电层位于平面层上。 其上具有电极的第二基板设置成与第一基板相对。 液晶层位于第一基板和第二基板之间的显示区域内。 密封剂位于第一基板和第二基板之间的密封剂区域内，导电球分布在密封剂中。

公开(公告)号：US20110292331A1

公开(公告)日：2011-12-01

申请号：US12909831

申请日：2010-10-22

Applicant: Ke-Chih Chang ,  Kuo-Yu Huang ,  Yu-Cheng Chen ,  Tsan-Chun Wang

Inventor： Ke-Chih Chang ,  Kuo-Yu Huang ,  Yu-Cheng Chen ,  Tsan-Chun Wang

IPC: G02F1/1333

CPC classification number: G02F1/13624 ,  G02F2001/13606

Abstract: A pixel structure includes a first and a second scan lines, a data line, a first insulating layer covering the first and the second scan lines and a portion of the data line and having a recess, a second insulating layer covering the first insulating layer, a capacitor electrode line covering the data line and the recess, a third insulating layer on the capacitor electrode line, a first active device electrically connected to the second scan line and the data line, a second active device electrically connected to the first active device and the first scan line, and a first and a second pixel electrodes electrically connected to the first and the second active devices, respectively. The portion of the data line and the first and the second scan lines are in the same layer. The recess is located at two sides of the portion of the data line.

Abstract translation: 像素结构包括第一和第二扫描线，数据线，覆盖第一和第二扫描线的第一绝缘层和数据线的一部分并具有凹部，覆盖第一绝缘层的第二绝缘层， 覆盖数据线和凹部的电容器电极线，电容器电极线上的第三绝缘层，与第二扫描线和数据线电连接的第一有源器件，与第一有源器件电连接的第二有源器件，以及 第一扫描线以及分别电连接到第一和第二有源器件的第一和第二像素电极。 数据线和第一和第二扫描线的部分在同一层中。 凹槽位于数据线部分的两侧。