公开(公告)号：US09070334B2

公开(公告)日：2015-06-30

申请号：US12760539

申请日：2010-04-14

申请人： Yu-Cheng Chen ,  Tsan-Chun Wang ,  Wan-Yu Lo

发明人： Yu-Cheng Chen ,  Tsan-Chun Wang ,  Wan-Yu Lo

IPC分类号： G09G3/32 ,  G09G3/36

CPC分类号： G09G3/3648 ,  G09G3/3607 ,  G09G2300/0426

摘要： A display device includes a plurality of gate lines, data lines, first external gate tracking lines, and second external gate tracking lines. The first external gate tracking lines are substantially disposed in a border region of a substrate, and electrically connected with corresponding gate lines. The second external gate tracking lines are substantially disposed in the border region of the substrate, and electrically connected with corresponding gate lines. One of the first external gate tracking lines and a corresponding second external gate tracking line at least partially overlap with each other.

摘要翻译： 显示装置包括多个栅极线，数据线，第一外部栅极跟踪线和第二外部栅极跟踪线。 第一外部栅极跟踪线基本上设置在基板的边界区域中，并与相应的栅极线电连接。 第二外部栅极跟踪线基本上设置在基板的边界区域中，并与相应的栅极线电连接。 第一外部栅极跟踪线之一和对应的第二外部栅极跟踪线至少部分地彼此重叠。

公开(公告)号：US08581888B2

公开(公告)日：2013-11-12

申请号：US13097095

申请日：2011-04-29

申请人： Chun-Chi Lai ,  Ching-Wei Chen ,  Tsan-Chun Wang ,  Kuo-Hsing Cheng ,  Yao-Jen Hsieh

发明人： Chun-Chi Lai ,  Ching-Wei Chen ,  Tsan-Chun Wang ,  Kuo-Hsing Cheng ,  Yao-Jen Hsieh

IPC分类号： G09G3/36

CPC分类号： G09G3/3614 ,  G09G2300/0426

摘要： A liquid crystal display (LCD) and an LCD panel thereof are provided. The structure of the pixel array of the LCD panel is the structure of the one third source driving (OTSD), and by which skillfully layout the coupled relationship among each pixel, each signal line and each scan line, such that the LCD panel can be driven by a column inversion to achieve the purpose of single-dot inversion displaying, and thus not only reducing the power consumption of the whole LCD, but also promoting the display quality.

摘要翻译： 提供液晶显示器（LCD）及其LCD面板。 LCD面板的像素阵列的结构是三分之一源驱动（OTSD）的结构，并且通过其巧妙地布置每个像素，每个信号线和每条扫描线之间的耦合关系，使得LCD面板可以 由列反转驱动，实现单点反转显示的目的，不仅可以降低整个LCD的功耗，还能提高显示质量。

公开(公告)号：US08497947B2

公开(公告)日：2013-07-30

申请号：US13118446

申请日：2011-05-29

申请人： Chun-Chi Lai ,  Ching-Wei Chen ,  Tsan-Chun Wang ,  Kuo-Hsing Cheng ,  Yu-Cheng Chen

发明人： Chun-Chi Lai ,  Ching-Wei Chen ,  Tsan-Chun Wang ,  Kuo-Hsing Cheng ,  Yu-Cheng Chen

IPC分类号： G02F1/1343 ,  G02F1/136 ,  G09G3/36

CPC分类号： G02F1/136213 ,  G02F1/136286 ,  G02F2001/134345 ,  G09G3/3648 ,  G09G2300/0426 ,  G09G2300/0439 ,  G09G2310/0205 ,  G09G2310/0213 ,  G09G2320/0214 ,  H01L27/1251

摘要： An LCD panel transmits the display data to sub-pixels in a zigzag pattern through a data line. The variation of the feed-through voltages of the sub-pixels may be modified by adjusting the ratios of the channel widths and the channel lengths of the TFTs in the sub-pixels to some predetermined ratios, or by adjusting the compensation capacitance to the coupling capacitance of the TFTs of the sub-pixels.

公开(公告)号：US20130178029A1

公开(公告)日：2013-07-11

申请号：US13343891

申请日：2012-01-05

申请人： Tsan-Chun WANG ,  Chun Hsiung TSAI

发明人： Tsan-Chun WANG ,  Chun Hsiung TSAI

IPC分类号： H01L21/8234 ,  H01L21/28

CPC分类号： H01L21/26506 ,  H01L21/2658 ,  H01L21/26593 ,  H01L21/823807 ,  H01L21/823814 ,  H01L21/823878 ,  H01L29/165 ,  H01L29/6653 ,  H01L29/66636 ,  H01L29/7847 ,  H01L29/7848

摘要： A semiconductor device having dislocations and a method of fabricating the semiconductor device is disclosed. The exemplary semiconductor device and method for fabricating the semiconductor device enhance carrier mobility. The method includes providing a substrate having an isolation feature therein and two gate stacks overlying the substrate, wherein one of the gate stacks is atop the isolation feature. The method further includes performing a pre-amorphous implantation process on the substrate. The method further includes forming spacers adjoining sidewalls of the gate stacks, wherein at least one of the spacers extends beyond an edge the isolation feature. The method further includes forming a stress film over the substrate. The method also includes performing an annealing process on the substrate and the stress film.

摘要翻译： 公开了一种具有位错的半导体器件和制造半导体器件的方法。 用于制造半导体器件的示例性半导体器件和方法增强载流子迁移率。 该方法包括提供其中具有隔离特征的衬底和覆盖衬底的两个栅极叠层，其中一个栅极堆叠位于隔离特征顶部。 该方法还包括在衬底上执行预非晶体注入工艺。 所述方法还包括形成邻接所述栅极叠层的侧壁的间隔区，其中所述间隔物中的至少一个延伸超过所述隔离特征的边缘。 该方法还包括在衬底上形成应力膜。 该方法还包括对衬底和应力膜进行退火处理。

公开(公告)号：US08405646B2

公开(公告)日：2013-03-26

申请号：US12629884

申请日：2009-12-03

申请人： Wan-Yu Lo ,  Tsan-Chun Wang ,  Yu-Cheng Chen ,  Maw-Song Chen

发明人： Wan-Yu Lo ,  Tsan-Chun Wang ,  Yu-Cheng Chen ,  Maw-Song Chen

IPC分类号： G06F3/038

CPC分类号： G09G3/20 ,  G09G2300/0408 ,  G09G2300/0426 ,  G09G2310/0281

摘要： A display panel including an active device array substrate, an opposite substrate and a display medium is provided. The active device array substrate includes a substrate, scan lines, data lines, pixel units, and data signal transmission lines. The scan lines and data lines define a plurality of pixel regions on the substrate. Each pixel unit is disposed within one of the pixel regions respectively, and each pixel unit includes a plurality of sub-pixel units. The sub-pixel units within the same pixel unit are electrically connected with the same data line, and each sub-pixel unit within the same pixel unit is electrically connected with one of the scan lines respectively. Each data signal transmission line is electrically connected with one of the data lines, and an extending direction of the data signal transmission line is substantially parallel with an extending direction of the scan lines.

摘要翻译： 提供了包括有源器件阵列衬底，相对衬底和显示介质的显示面板。 有源器件阵列衬底包括衬底，扫描线，数据线，像素单元和数据信号传输线。 扫描线和数据线在衬底上限定多个像素区域。 每个像素单元分别设置在一个像素区域内，并且每个像素单元包括多个子像素单元。 相同像素单元内的子像素单元与相同的数据线电连接，并且相同像素单元内的每个子像素单元分别与扫描线之一电连接。 每个数据信号传输线与数据线之一电连接，并且数据信号传输线的延伸方向与扫描线的延伸方向基本平行。

公开(公告)号：US20110233567A1

公开(公告)日：2011-09-29

申请号：US12788301

申请日：2010-05-27

申请人： Yi-Hui Li ,  Yu-Cheng Chen ,  Tsan-Chun Wang ,  Chih-Hung Lin ,  Tung-Huang Chen

发明人： Yi-Hui Li ,  Yu-Cheng Chen ,  Tsan-Chun Wang ,  Chih-Hung Lin ,  Tung-Huang Chen

IPC分类号： H01L33/00

CPC分类号： H01L27/12 ,  G02F1/136286 ,  G02F2201/40 ,  H01L27/124

摘要： A pixel array is located on a substrate and includes a plurality of pixel sets. Each of the pixel sets includes a first scan line, a second scan line, a data line, a data signal transmission line, a first pixel unit, and a second pixel unit. The data line is not parallel to the first and the second scan lines. The data signal transmission line is disposed parallel to the first and the second scan lines and electrically connected to the data line. Distance between the first and the second scan lines is smaller than distance between the data signal transmission line and one of the first and the second scan lines. The first pixel unit is electrically connected to the first scan line and the data line. The second pixel unit is electrically connected to the second scan line and the data line.

摘要翻译： 像素阵列位于衬底上并且包括多个像素组。 每个像素组包括第一扫描线，第二扫描线，数据线，数据信号传输线，第一像素单元和第二像素单元。 数据线不平行于第一和第二扫描线。 数据信号传输线平行于第一和第二扫描线设置并与数据线电连接。 第一和第二扫描线之间的距离小于数据信号传输线与第一和第二扫描线之一之间的距离。 第一像素单元电连接到第一扫描线和数据线。 第二像素单元电连接到第二扫描线和数据线。

公开(公告)号：US20110080388A1

公开(公告)日：2011-04-07

申请号：US12629884

申请日：2009-12-03

申请人： Wan-Yu Lo ,  Tsan-Chun Wang ,  Yu-Cheng Chen ,  Maw-Song Chen

发明人： Wan-Yu Lo ,  Tsan-Chun Wang ,  Yu-Cheng Chen ,  Maw-Song Chen

IPC分类号： G09G5/00 ,  G09G3/20

CPC分类号： G09G3/20 ,  G09G2300/0408 ,  G09G2300/0426 ,  G09G2310/0281

摘要： A display panel including an active device array substrate, an opposite substrate and a display medium is provided. The active device array substrate includes a substrate, scan lines, data lines, pixel units, and data signal transmission lines. The scan lines and data lines define a plurality of pixel regions on the substrate. Each pixel unit is disposed within one of the pixel regions respectively, and each pixel unit includes a plurality of sub-pixel units. The sub-pixel units within the same pixel unit are electrically connected with the same data line, and each sub-pixel unit within the same pixel unit is electrically connected with one of the scan lines respectively. Each data signal transmission line is electrically connected with one of the data lines, and an extending direction of the data signal transmission line is substantially parallel with an extending direction of the scan lines.

摘要翻译： 提供了包括有源器件阵列衬底，相对衬底和显示介质的显示面板。 有源器件阵列衬底包括衬底，扫描线，数据线，像素单元和数据信号传输线。 扫描线和数据线在衬底上限定多个像素区域。 每个像素单元分别设置在一个像素区域内，并且每个像素单元包括多个子像素单元。 相同像素单元内的子像素单元与相同的数据线电连接，并且相同像素单元内的每个子像素单元分别与扫描线之一电连接。 每个数据信号传输线与数据线之一电连接，并且数据信号传输线的延伸方向与扫描线的延伸方向基本平行。

公开(公告)号：US20100315583A1

公开(公告)日：2010-12-16

申请号：US12788876

申请日：2010-05-27

申请人： Hsiang-Lin Lin ,  Ching-Huan Lin ,  Chih-Hung Shih ,  Wei-Ming Huang ,  Chih-Hung Lin ,  Yu-Cheng Chen ,  Yi-Hui Li ,  Tsan-Chun Wang

发明人： Hsiang-Lin Lin ,  Ching-Huan Lin ,  Chih-Hung Shih ,  Wei-Ming Huang ,  Chih-Hung Lin ,  Yu-Cheng Chen ,  Yi-Hui Li ,  Tsan-Chun Wang

IPC分类号： G02F1/1343 ,  H01L21/84

CPC分类号： G02F1/136209 ,  G02F1/136213 ,  G02F2001/13606 ,  G02F2201/40 ,  H01L27/1248 ,  H01L27/1255

摘要： This invention in one aspect relates to a pixel structure. In one embodiment, the pixel structure includes a scan line formed on a substrate and a data line formed over the substrate defining a pixel area, a switch formed inside the pixel area on the substrate, a shielding electrode formed over the switch, a plane organic layer formed over the date line and the pixel area and having no overlapping with the shielding electrode, and a pixel electrode having a first portion and a second portion extending from the first portion, and formed over the shielding electrode and the plane organic layer in the pixel area, wherein the first portion is overlapped with the shielding electrode so as to define a storage capacitor therebetween, and the second portion overlays the plane organic layer and has no overlapping with the data line.

摘要翻译： 本发明在一个方面涉及像素结构。 在一个实施例中，像素结构包括形成在衬底上的扫描线和形成在限定像素区域的衬底上的数据线，形成在衬底上的像素区域内的开关，形成在开关上的屏蔽电极，有机平面 形成在日期线和像素区域上并且与屏蔽电极不重叠的像素电极，以及具有从第一部分延伸的第一部分和第二部分的像素电极，并且形成在屏蔽电极和平面有机层的上方 像素区域，其中第一部分与屏蔽电极重叠以便在其间限定存储电容器，并且第二部分覆盖平面有机层并且不与数据线重叠。

公开(公告)号：US20130309829A1

公开(公告)日：2013-11-21

申请号：US13471986

申请日：2012-05-15

申请人： Ziwei Fang ,  Tsan-Chun Wang ,  De-Wei Yu

发明人： Ziwei Fang ,  Tsan-Chun Wang ,  De-Wei Yu

IPC分类号： H01L21/336

CPC分类号： H01L29/7848 ,  H01L21/26506 ,  H01L21/26586 ,  H01L21/26593 ,  H01L21/324 ,  H01L21/823807 ,  H01L21/823814 ,  H01L21/823878 ,  H01L29/1608 ,  H01L29/165 ,  H01L29/66636 ,  H01L29/7847

摘要： A semiconductor device having dislocations and a method of fabricating the semiconductor device is disclosed. The exemplary semiconductor device and method for fabricating the semiconductor device enhance carrier mobility. The method includes providing a substrate having an isolation feature therein and two gate stacks overlying the substrate, wherein one of the gate stacks is atop the isolation feature. The method further includes performing a pre-amorphous implantation process on the substrate. The method further includes forming a stress film over the substrate. The method also includes performing an annealing process on the substrate and the stress film.

摘要翻译： 公开了一种具有位错的半导体器件和制造半导体器件的方法。 用于制造半导体器件的示例性半导体器件和方法增强载流子迁移率。 该方法包括提供其中具有隔离特性的衬底和覆盖衬底的两个栅极叠层，其中一个栅极堆叠位于隔离特征顶部。 该方法还包括在衬底上执行预非晶体注入工艺。 该方法还包括在衬底上形成应力膜。 该方法还包括对衬底和应力膜进行退火处理。

公开(公告)号：US20130009216A1

公开(公告)日：2013-01-10

申请号：US13177309

申请日：2011-07-06

申请人： Chun Hsiung Tsai ,  Tsan-Chun Wang

发明人： Chun Hsiung Tsai ,  Tsan-Chun Wang

IPC分类号： H01L29/78 ,  H01L21/28 ,  H01L21/22

CPC分类号： H01L27/088 ,  H01L21/26506 ,  H01L21/823807 ,  H01L21/823828 ,  H01L21/823878 ,  H01L29/7847 ,  H01L29/7848

摘要： A semiconductor device with bi-layer dislocation and method of fabricating the semiconductor device is disclosed. The exemplary semiconductor device and method for fabricating the semiconductor device enhance carrier mobility. The method includes providing a substrate having a gate stack. The method further includes performing a first pre-amorphous implantation process on the substrate and forming a first stress film over the substrate. The method also includes performing a first annealing process on the substrate and the first stress film. The method further includes performing a second pre-amorphous implantation process on the annealed substrate, forming a second stress film over the substrate and performing a second annealing process on the substrate and the second stress film.

摘要翻译： 公开了一种具有双层位错的半导体器件和制造半导体器件的方法。 用于制造半导体器件的示例性半导体器件和方法增强载流子迁移率。 该方法包括提供具有栅叠层的衬底。 该方法还包括在衬底上执行第一预非晶体注入工艺并在衬底上形成第一应力膜。 该方法还包括对基板和第一应力膜执行第一退火处理。 该方法还包括在退火的衬底上执行第二预非晶体注入工艺，在衬底上形成第二应力膜，并对衬底和第二应力膜执行第二退火处理。