Data recording/reproducing apparatus having a first error correcting
code on both sides of a main data area of each azimuth track
    21.
    发明授权
    Data recording/reproducing apparatus having a first error correcting code on both sides of a main data area of each azimuth track 失效
    数据记录/重放装置,在每个方位磁道的主数据区的两侧具有第一纠错码

    公开(公告)号:US5559644A

    公开(公告)日:1996-09-24

    申请号:US399636

    申请日:1995-03-07

    摘要: A data recording method and apparatus with reduced probability of error occurrence in main data. For recording data on azimuth tracks on a magnetic tape by a rotary magnetic head, each azimuth track is divided into a main data area and margin areas on both sides of the main data area. The main data recorded in the main data area of each track is arrayed two-dimensionally. An error correction code C2 is appended to a data string arrayed in the track direction, while an error correction code C1 is appended to a data string arrayed along the track width. The error correction code C2 is divided into two portions which are arrayed on both sides of the main data area of each track. This reduces the probability of error occurrence in the main data.

    摘要翻译: 一种数据记录方法和装置,其主要数据中发生错误概率。 为了通过旋转磁头在磁带上的方位磁迹上记录数据,每个方位轨道被划分为主数据区域和主数据区域两侧的边缘区域。 记录在每个轨道的主数据区中的主数据被二维地排列。 将纠错码C2附加到沿轨道方向排列的数据串,同时将纠错码C1附加到沿着轨道宽度排列的数据串。 纠错码C2被划分为在每个轨道的主数据区的两侧排列的两个部分。 这降低了主要数据中发生错误的可能性。

    Synchronizing circuit
    22.
    发明授权
    Synchronizing circuit 失效
    同步电路

    公开(公告)号:US4669000A

    公开(公告)日:1987-05-26

    申请号:US706924

    申请日:1985-02-12

    摘要: This invention relate to a synchronizing circuit for a data signal in which a data signal is divided at every predetermined number of bits, and every divided data signal is added with a synchronizing signal, an arbitrary address signal and an error detection signal for the address signal and received so as to be written in a memory in accordance with the address signal, which includes means (4) for detecting the synchronizing signal and means (3) for detecting an error of the address signal. The circuit further comprising an interpolation synchronizing signal generating circuit (6) and an interpolation address signal generating circuit (10), in which when the address signal is judged as being correct by the error detecting means (3), the interpolation synchronizing signal generating circuit (6) is driven, the interpolation address signal generating circuit (10) is driven by an interpolation synchronizing signal from the interpolation synchronizing signal generating circuit (6), and the address signal and the interpolation address signal are changed over on the basis of whether the address signal is correct or erroneous and then fed to the memory (13 ). According to this invention, it is possible to establish the synchronization by a circuit of a simple construction.

    摘要翻译: PCT No.PCT / JP84 / 00307 Sec。 371日期1985年2月12日 102(e)1985年2月12日PCT申请日1984年6月13日PCT公布。 第WO85 / 00066号公报 日期:1985年1月3日。本发明涉及一种数据信号的同步电路,其中数据信号以每预定位数分频,并且每个划分的数据信号加上同步信号,任意地址信号和 用于地址信号的误差检测信号,并被接收以便根据地址信号被写入存储器,该地址信号包括用于检测同步信号的装置(4)和用于检测地址信号的误差的装置(3)。 该电路还包括内插同步信号发生电路(6)和内插地址信号发生电路(10),其中当误差检测装置(3)判断为地址信号是正确的时,内插同步信号发生电路 (6)被驱动时,内插地址信号发生电路(10)由内插同步信号发生电路(6)的内插同步信号驱动,地址信号和内插地址信号根据是否 地址信号是正确的或错误的,然后被馈送到存储器(13)。 根据本发明,可以通过简单结构的电路来建立同步。

    Error correction method using Reed-Solomon code
    27.
    发明授权
    Error correction method using Reed-Solomon code 失效
    使用Reed-Solomon码的纠错方法

    公开(公告)号:US4852099A

    公开(公告)日:1989-07-25

    申请号:US151624

    申请日:1988-02-02

    申请人: Shinya Ozaki

    发明人: Shinya Ozaki

    IPC分类号: H03M13/29 H03M13/15 H03M13/27

    CPC分类号: H03M13/15

    摘要: In an error correction method using Reed-Solomon code when the error correction is performed by using the result of the multiplication of a syndrome and an error location, another syndrome is added to thereby form a new syndrome. By repetitively executing this procedure, the error vector is obtained by a small number of arithmetic operations relative to a known procedure, thereby performing error correction by the so-called erasure correction technique. Then, by calculating another error vector using the first calculated error vector, the number of arithmetic operation times can be even further reduced.

    Encoding method for error correction
    28.
    发明授权
    Encoding method for error correction 失效
    纠错编码方法

    公开(公告)号:US4630272A

    公开(公告)日:1986-12-16

    申请号:US604537

    申请日:1984-04-27

    CPC分类号: G11B20/1809

    摘要: An encoding method for error correction of digital information data is provided. The encoding method comprises the steps of arranging the digital information data in a plurality of blocks each including a plurality of symbols, and generating first redundacy data from first respective groups of digital information data constituting symbols which exist in at least two blocks in a first direction. Second redundancy data is generated from second respective groups of digital information data constituting symbols which are included in the plurality of blocks in a second direction. First code sequences are formed for first error detection from the first digital information data groups and the first redundancy data, and second code sequences are formed for second error detection from the second digital information data group and the second redundancy code. Blocks including at least one of the digital information data and the first redundancy data are transmitted, and blocks including the second redundancy data are also transmitted.

    摘要翻译: 提供了一种用于数字信息数据的纠错的编码方法。 编码方法包括以下步骤:将数字信息数据排列在多个块中,每个块包括多个符号,并且从构成符号的第一组数字信息数据生成第一冗余数据,所述数字信息数据存在于至少两个块中的第一方向 。 从在第二方向上包括在多个块中的构成符号的第二组数字信息数据生成第二冗余数据。 形成第一代码序列用于来自第一数字信息数据组和第一冗余数据的第一错误检测,并且形成第二代码序列用于来自第二数字信息数据组和第二冗余码的第二错误检测。 发送包括数字信息数据和第一冗余数据中的至少一个的块,并且还发送包括第二冗余数据的块。