公开(公告)号：US09218158B2

公开(公告)日：2015-12-22

申请号：US14622860

申请日：2015-02-14

申请人： Peter Lablans

发明人： Peter Lablans

IPC分类号： G06F7/487 ,  H03M7/00 ,  H04L9/06 ,  G06F5/01 ,  H03M13/09 ,  H03M13/15 ,  H03M13/19 ,  H03M13/23

CPC分类号： G06F7/4876 ,  G06F5/012 ,  H03M7/00 ,  H03M13/09 ,  H03M13/1515 ,  H03M13/158 ,  H03M13/19 ,  H03M13/23 ,  H04L9/06

摘要： Shift register based circuits include non-binary polynomial calculation circuits, coder circuits, scramblers, descramblers and sequence generators that apply non-binary two-input/single output switching functions wherein at least one input contains a non-binary inverter or multiplier. A combination of a two-input/single output non-binary switching device with at least one non-binary inverter at an input is advantageously reduced to a single device that implements a single non-binary switching function. The reduced single device may be an electronic memory that stores the truth table of the single non-binary switching function.

摘要翻译： 基于移位寄存器的电路包括非二进制多项式计算电路，编码器电路，加扰器，解扰器和序列发生器，其应用非二进制双输入/单输出开关功能，其中至少一个输入包含非二进制反相器或乘法器。 两输入/单输出非二进制开关器件与输入端的至少一个非二进制反相器的组合有利地被简化为实现单个非二进制开关功能的单个器件。 减少的单个设备可以是存储单个非二进制切换功能的真值表的电子存储器。

公开(公告)号：US08832523B2

公开(公告)日：2014-09-09

申请号：US12400900

申请日：2009-03-10

申请人： Peter Lablans

发明人： Peter Lablans

IPC分类号： H03M13/00 ,  H03M13/29 ,  G06F11/10

CPC分类号： H03M13/29 ,  G06F11/1012 ,  G06F11/1028 ,  G06F11/1072

摘要： Methods and apparatus create codewords of n-state symbols having one of 3 or more states with n-state check symbols. Check symbols are created from independent expressions. Codewords are associated with a matrix for detection of one or more symbols in error and the location of such symbols in error. Symbols in error are reconstructed from symbols not in error, error syndromes and check symbols not in error. Deliberately created errors that can be corrected are used as nuisance errors.

摘要翻译： 方法和装置创建具有n状态检查符号的具有3个或更多个状态中的一个的n状态符号的码字。 检查符号是从独立表达式创建的。 码字与用于检测错误中的一个或多个符号的矩阵以及错误的这种符号的位置相关联。 错误的符号从不是错误的符号重建，错误综合征和检查符号不是错误的。 故意创建的可以纠正的错误被用作妨扰错误。

公开(公告)号：US08374289B2

公开(公告)日：2013-02-12

申请号：US12502410

申请日：2009-07-14

申请人： Peter Lablans

发明人： Peter Lablans

IPC分类号： H03D1/00

CPC分类号： H04J13/105

摘要： Method and apparatus for generating ternary and multi-valued Gold sequences, are disclosed. Also methods to detect ternary and multi-valued sequences are disclosed. The detection can be performed by a ternary or multi-valued LFSR descrambler when the sequences are generated by an LFSR based sequence generator. A wireless system which can assign additional sequences to designated users is also disclosed. The wireless system can also transfer information to user equipment that enables methods for sequence generation and sequence detection.

公开(公告)号：US08364977B2

公开(公告)日：2013-01-29

申请号：US12137945

申请日：2008-06-12

申请人： Peter Lablans

发明人： Peter Lablans

IPC分类号： G06F11/30 ,  G06F12/14

CPC分类号： G06F7/582 ,  G06F7/584 ,  H04L9/0662 ,  H04L2209/125 ,  H04L2209/34

摘要： Multi-valued or n-state with n=2p Linear Feedback Shift Registers (LFSRs) in binary form are provided for scramblers, descramblers and sequence generators using addition and multiplication functions over a Finite Field GF(n) in binary form. N-state switching functions in an LFSR are implemented by using implementations of reversible binary functions. LFSRs may be in Fibonacci or in Galois configuration. N-state LFSR based sequence generators in binary form for generating an n-state maximum length sequence in binary form are also provided. A method for simple correlation calculation is provided. Communication systems and data storage systems using the LFSRs are also disclosed.

摘要翻译： 具有n = 2p的多值或n态具有二进制形式的线性反馈移位寄存器（LFSR）用于二进制形式的有限域GF（n）上的加法和乘法函数的扰频器，解扰器和序列发生器。 通过使用可逆二进制函数的实现来实现LFSR中的N状态切换功能。 LFSR可以是斐波纳契或Galois配置。 还提供了用于产生二进制形式的n状态最大长度序列的二态形式的基于N态LFSR的序列生成器。 提供了一种简单相关计算的方法。 还公开了使用LFSR的通信系统和数据存储系统。

公开(公告)号：US08225147B2

公开(公告)日：2012-07-17

申请号：US12758101

申请日：2010-04-12

申请人： Peter Lablans

发明人： Peter Lablans

IPC分类号： G06F11/00

CPC分类号： G11B20/00086 ,  G11B20/0021 ,  G11B2220/2537

摘要： Method and apparatus for writing scrambled multi-value data to a physical media and for reading scrambled multi-value data from a physical media, are disclosed. The physical media can be an optical disk. The scrambling can be performed by a multi-valued LFSR scrambler and the descrambling can be performed by a multi-valued LFSR descrambler. Further, the multi-valued data that is scrambled can include synchronization data and/or user data. Error correction coding can be used during the writing process and processing to correct for errors can be used during the reading process. Also, methods and apparatus for synchronizing multi-valued data written to and read from physical media are disclosed. Multi-value correlation methods and apparatus are also disclosed.

摘要翻译： 公开了用于将加扰的多值数据写入物理介质并从物理介质读取加扰的多值数据的方法和装置。 物理介质可以是光盘。 可以由多值LFSR加扰器执行加扰，并且可以由多值LFSR解扰器执行解扰。 此外，加密的多值数据可以包括同步数据和/或用户数据。 在写入过程中可以使用纠错编码，并且可以在读取过程中使用纠正错误的处理。 此外，公开了用于同步写入物理介质和从物理介质读取的多值数据的方法和装置。 还公开了多值相关方法和装置。

公开(公告)号：US07877670B2

公开(公告)日：2011-01-25

申请号：US11566725

申请日：2006-12-05

申请人： Peter Lablans

发明人： Peter Lablans

IPC分类号： H03M13/00

CPC分类号： H03M13/23 ,  H03M13/39 ,  H03M13/41

摘要： The invention relates to error-correcting coding and correct restart of decoding after errors of sequences that are coded by convolutional coders or LFSR based descramblers. The signals can be binary or multi-valued signals. Methods and apparatus to convolutional encode and decode sequences of binary and n-valued symbols are disclosed. The invention further discloses methods and apparatus to identify symbols in error in sequences coded according to methods of the invention. Methods and apparatus to correct these errors are provided. Methods and apparatus to repair errors in a Trellis of received sequences are also provided. Methods and apparatus for n-valued Recursive Systematic Convolutional coders and decoders are disclosed.

摘要翻译： 本发明涉及在由卷积编码器或基于LFSR的解扰器编码的序列的错误之后的纠错编码和纠正重新开始解码。 信号可以是二进制或多值信号。 公开了对二进制和n值符号序列进行卷积编码和解码的方法和装置。 本发明还公开了根据本发明方法编码的序列中错误识别符号的方法和装置。 提供了纠正这些错误的方法和装置。 还提供了修复接收序列网格错误的方法和装置。 公开了n值递归系统卷积编码器和解码器的方法和装置。

公开(公告)号：US20100322414A1

公开(公告)日：2010-12-23

申请号：US12868874

申请日：2010-08-26

申请人： Peter Lablans

发明人： Peter Lablans

IPC分类号： H04L9/28

CPC分类号： H04L25/03866

摘要： Ternary (3-value) and higher, multi-value digital scramblers/descramblers in digital communications. The method and apparatus of the present invention includes the creation of ternary (3-value) and higher value truth tables that establish ternary and higher value scrambling functions which are its own descrambling functions. The invention directly codes by scrambling ternary and higher-value digital signals and directly decodes by descrambling with the same function. A disclosed application of the invention is the creation of composite ternary and higher-value scrambling devices and methods consisting of single scrambling devices or functions combined with ternary or higher value shift registers. Another disclosed application is the creation of ternary and higher-value spread spectrum digital signals. Another disclosed application is a composite ternary or higher value scrambling system, comprising an odd number of scrambling functions and the ability to be its own descrambler.

摘要翻译： 三值（3值）以上，多值数字加扰/解码器在数字通信。 本发明的方法和装置包括创建三值（3值）和更高价值的真值表，其建立作为它自己的解扰功能的三值和更高值的加扰函数。 本发明通过对三进制数值信号进行加扰直接编码，并通过相同功能的解扰直接解码。 本发明的公开的应用是创建由单个扰码设备或与三元或更高值移位寄存器组合的功能组成的复合三元和更高值的加扰设备和方法。 另一个公开的应用是创建三值和更高价值的扩频数字信号。 另一个公开的应用是复合三元或更高值的加扰系统，其包括奇数个加扰功能以及作为其自己的解扰器的能力。

公开(公告)号：US07656196B2

公开(公告)日：2010-02-02

申请号：US12061286

申请日：2008-04-02

申请人： Peter Lablans

发明人： Peter Lablans

IPC分类号： H03K19/00

CPC分类号： G06F7/49 ,  G06F17/5045 ,  G11C11/56 ,  H03K19/0002

摘要： N-valued re-circulating latches using n-valued reversible inverters with n>3 are disclosed. Latches using n-valued self-reversing inverters are provided; latches using n-valued universal inverters are provided; and latches using inverters which are not self-reversing or universal are also provided. A latch may use two individually controlled gates. It may also use one individually controlled gate. N-valued latches are provided wherein a state is represented by a signal being an independent instance of a physical phenomenon. A latch not using absence-of-signal as a state is also provided.

摘要翻译： 公开了使用n值大于3的n值可逆逆变器的N值再循环锁存器。 提供使用n值自逆变换器的锁存器; 提供使用n值通用逆变器的锁存器; 并且还提供使用不是自反转或通用的逆变器的锁存器。 闩锁可以使用两个单独控制的门。 它也可以使用一个单独控制的门。 提供了N值锁存器，其中状态由作为物理现象的独立实例的信号表示。 还提供了不使用不存在信号作为状态的锁存器。

公开(公告)号：US07643632B2

公开(公告)日：2010-01-05

申请号：US10935960

申请日：2004-09-08

申请人： Peter Lablans

发明人： Peter Lablans

IPC分类号： H04L9/00

CPC分类号： H03K19/20

摘要： Reversible and self reversing multi-value scrambling functions created by applying multi-value inverters are disclosed. The generation of possible multi-value inverters is also presented. Corresponding multi-value descrambling functions are also disclosed. The multi-value functions are used in circuits that scramble and descramble multi-value signals. The multi-value functions can also be used in signal generators. Such signal generators do not require the use of multipliers. The auto-correlation of the signals generated by the signal generators is also presented. Electronic circuits that implement the multi-value functions are also described.

摘要翻译： 公开了通过应用多值逆变器创建的可逆和自反转的多值加扰功能。 还提出了可能的多值逆变器的产生。 还公开了相应的多值解扰功能。 多值函数用于加扰和解扰多值信号的电路中。 多值函数也可用于信号发生器。 这样的信号发生器不需要使用乘法器。 还提出了由信号发生器产生的信号的自相关。 还描述了实现多值功能的电子电路。

公开(公告)号：US20070110229A1

公开(公告)日：2007-05-17

申请号：US11618986

申请日：2007-01-02

申请人： Peter Lablans

发明人： Peter Lablans

IPC分类号： H04L9/28

CPC分类号： H03K19/20

摘要： Reversible and self reversing multi-value scrambling functions created by applying multi-value inverters are disclosed. The generation of possible multi-value inverters is also presented. Corresponding multi-value descrambling functions are also disclosed. The multi-value functions are used in circuits that scramble and descramble multi-value signals. The multi-value functions can also be used in signal generators. Such signal generators do not require the use of multipliers. The auto-correlation of the signals generated by the signal generators is also presented. Electronic circuits that implement the multi-value functions are also described.

摘要翻译： 公开了通过应用多值逆变器创建的可逆和自反转的多值加扰功能。 还提出了可能的多值逆变器的产生。 还公开了相应的多值解扰功能。 多值函数用于加扰和解扰多值信号的电路中。 多值函数也可用于信号发生器。 这样的信号发生器不需要使用乘法器。 还提出了由信号发生器产生的信号的自相关。 还描述了实现多值功能的电子电路。