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公开(公告)号：US3386035A
公开(公告)日：1968-05-28
申请号：US50744965
申请日：1965-11-12
申请人： GEN ELECTRIC
发明人： WOOD DAVID E
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公开(公告)号：US3151240A
公开(公告)日：1964-09-29
申请号：US5878960
申请日：1960-09-27
申请人： BENDIX CORP
发明人： WILLIAM HENN , ROBINSON ARTHUR S
IPC分类号： G06G7/30
CPC分类号： G06G7/30
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公开(公告)号：US3119930A
公开(公告)日：1964-01-28
申请号：US77137758
申请日：1958-11-03
申请人： ZENITH RADIO CORP
发明人： ISABEAU JEAN G V
IPC分类号： G06G7/30
CPC分类号： G06G7/30
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公开(公告)号：US2908889A
公开(公告)日：1959-10-13
申请号：US55362655
申请日：1955-12-16
发明人： PIETY RAYMOND G
CPC分类号： G06G7/1928 , G01V1/288 , G06G7/30
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公开(公告)号：US5051746A
公开(公告)日：1991-09-24
申请号：US497285
申请日：1990-03-22
摘要： An interpolation circuit for an A/D converter comprises a first and a second pair of inputs (2, 2'; 3, 3') and at least three pairs of outputs (20, 20'; 24, 24'; 21, 21'). The pairs of inputs receive pairs of two input signals (V.sub.1, V.sub.1c, V.sub.5, V.sub.5c) which are substantially complementary to one another. At least two pairs of outputs (20, 20'; 24, 24') supply pairs of two substantially complementary output signals. A first output (21) of the third pair of outputs (21, 21') is coupled to a first input (2) of the first pair of inputs (2, 2'). The second output (21') of the third pair of outputs is connected to a circuit node other than one of the inputs of the first pair of inputs. This node may be, for example, the first input (3') of the second pair of inputs (FIG. 9). Another possibility is to make the node one end (38) of an impedance element (32) which has its other end coupled to the second input (2') of the first pair of inputs (FIG. 3).
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公开(公告)号：US4238831A
公开(公告)日：1980-12-09
申请号：US939023
申请日：1978-09-01
申请人： Yuly M. Pulyer
发明人： Yuly M. Pulyer
摘要： Received periodic pulses of varying amplitude, representing a measured analog signal, are alternately applied to two interpolation channels through gates alternately activated by a flip-flop element responsive to each incoming pulse. Each channel converts the applied pulses into an interpolated value which is summed with that of the other channel to substantially reproduce the original analog signal value. In a first specific arrangement, each pulse is converted, by the integration of the stored pulse amplitude, into a triangular shaped signal having a height equal to the corresponding pulse amplitude and a base equal to twice the pulse spacing. The successive triangular signals from each channel, each overlapping the adjacent pulse signals from the other channel, are summed to produce an interpolated analog output substantially equivalent to the original analog signal. In a second arrangement, the triangular pulses are formed by generating sine and cosine functional waves with the amplitude of each single half cycle selected in accordance with that of the corresponding digital pulse. A third arrangement uses cosine.sup.2 functions to provide the interpolation values.
摘要翻译： 代表测量的模拟信号的接收到的振幅变化的周期脉冲通过响应于每个输入脉冲由触发器元件交替激活的栅极被交替地施加到两个插值通道。 每个通道将施加的脉冲转换成与另一通道的内插值相加的内插值，以基本上再现原始模拟信号值。 在第一具体布置中，通过将存储的脉冲幅度的积分转换成具有等于相应脉冲幅度的高度的三角形信号和等于脉冲间隔的两倍的每个脉冲。 来自每个通道的每个通道的相邻三角形信号与来自另一个通道的相邻脉冲信号重叠，以产生基本上等同于原始模拟信号的内插模拟输出。 在第二种布置中，通过产生正弦和余弦功能波来形成三角形脉冲，其中每个单个半周期的幅度根据相应数字脉冲的幅度选择。 第三种方案使用余弦函数来提供内插值。
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公开(公告)号：US4200843A
公开(公告)日：1980-04-29
申请号：US865114
申请日：1977-12-28
申请人： Tsuneyuki Egami , Hisasi Kawai , Tokio Kohama , Hideki Obayashi
发明人： Tsuneyuki Egami , Hisasi Kawai , Tokio Kohama , Hideki Obayashi
CPC分类号： G06G7/30
摘要： A non-linear operational circuit with reference voltage sources and switching means, wherein the output voltage of the operational circuit is compared with the reference voltages to open and close the switching means in accordance with their magnitudes relative to one another and thereby to non-linearly vary the output voltage of the operational circuit in response to changes in the input voltage. The reference voltage sources and the switching means are connected in series between the output terminal and the ground terminal of the operational circuit, whereby at the inflection point at which the ratio of the change in the output voltage of the operational circuit to the change in the input voltage changes, the output voltage is caused to change continuously.
摘要翻译： 一种具有参考电压源和开关装置的非线性运行电路，其中将运算电路的输出电压与参考电压进行比较，以根据它们相对于彼此的幅度打开和闭合开关装置，从而非线性地 响应于输入电压的变化，改变操作电路的输出电压。 参考电压源和开关装置串联在操作电路的输出端子和接地端子之间，由此在操作电路的输出电压的变化比与其中的变化的拐点 输入电压变化，输出电压不断变化。
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公开(公告)号：US4150436A
公开(公告)日：1979-04-17
申请号：US864125
申请日：1977-12-23
申请人： Troy J. Pemberton
发明人： Troy J. Pemberton
CPC分类号： G01N30/8603 , G06G7/30
摘要： A method and apparatus is provided which can correctly reproduce any signal with a constant slope in time. The signal of interest is sampled at two different times t.sub.1 and t.sub.2. The two sampled values are then utilized to predict the value of the signal of interest at a time t.sub.3. In this manner trend information is provided concerning the signal of interest between the sample times t.sub.2 and t.sub.3.
摘要翻译： 提供一种可以在时间上以恒定斜率正确地再现任何信号的方法和装置。 感兴趣的信号在两个不同的时间t1和t2进行采样。 然后利用两个采样值来预测在时间t3的感兴趣信号的值。 以这种方式提供关于采样时间t2和t3之间的感兴趣的信号的趋势信息。
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公开(公告)号：US3839650A
公开(公告)日：1974-10-01
申请号：US37304873
申请日：1973-06-25
申请人： HUGHES AIRCRAFT CO
发明人： WOOD R
CPC分类号： G06G7/30
摘要： The signal processor disclosed herein provides an output signal which is a filtered reproduction of an applied input signal; and includes a first circuit for forming the difference between the applied signal and the output signal, a second circuit for periodically sampling and storing the value of this difference, and a third circuit for integrating the sampled and stored difference value to produce the output signal.
摘要翻译： 本文公开的信号处理器提供输出信号，其是施加的输入信号的滤波再现; 并且包括用于形成施加的信号和输出信号之间的差的第一电路，用于周期性地采样并存储该差的值的第二电路，以及用于积分采样和存储的差值以产生输出信号的第三电路。
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