摘要:
Methods for matrix processing and devices therefor are described. A systolic array in an integrated circuit is coupled to receive a first matrix as input; and is capable of operating in two modes, namely a triangularization mode and a back-substitution mode. The systolic array, when in a triangularization mode, is coupled to triangularize the first matrix to provide a second matrix. When in a back-substitution mode, the systolic array is coupled to invert the second matrix.
摘要:
Combining multiple clusterings arises in various important data mining scenarios. However, finding a consensus clustering from multiple clusterings is a challenging task because there is no explicit correspondence between the classes from different clusterings. Provided is a framework based on soft correspondence to directly address the correspondence problem in combining multiple clusterings. Under this framework, an algorithm iteratively computes the consensus clustering and correspondence matrices using multiplicative updating rules. This algorithm provides a final consensus clustering as well as correspondence matrices that gives intuitive interpretation of the relations between the consensus clustering and each clustering from clustering ensembles. Extensive experimental evaluations demonstrate the effectiveness and potential of this framework as well as the algorithm for discovering a consensus clustering from multiple clusterings.
摘要:
Systems and methods for electronic postmarking of location data are provided. Electronic postmarking of location data (S.20) includes generating a hash value corresponding to merged data (S.30). Electronic postmarking further includes generating an electronic postmark data structure (S.40) comprising the hash value and a date/time stamp. The electronic postmarking data structure (S.40) may further include a digital signature.
摘要:
The present invention provides a system and method for eliminating duplicate data (de-duplication) in substantially real time using an electronic storage medium.
摘要:
Techniques for decomposing matrices using Jacobi rotation are described. Multiple iterations of Jacobi rotation are performed on a first matrix of complex values with multiple Jacobi rotation matrices of complex values to zero out the off-diagonal elements in the first matrix. For each iteration, a submatrix may be formed based on the first matrix and decomposed to obtain eigenvectors for the submatrix, and a Jacobi rotation matrix may be formed with the eigenvectors and used to update the first matrix. A second matrix of complex values, which contains orthogonal vectors, is derived based on the Jacobi rotation matrices. For eigenvalue decomposition, a third matrix of eigenvalues may be derived based on the Jacobi rotation matrices. For singular value decomposition, a fourth matrix with left singular vectors and a matrix of singular values may be derived based on the Jacobi rotation matrices.
摘要:
A parallel-computing iterative solver is provided that employs a preconditioner that is processed using parallel-computing for solving linear systems of equations. Thus, a preconditioning algorithm is employed for parallel iterative solution of a large sparse system of linear system of equations (e.g., algebraic equations, matrix equations, etc.), such as the linear system of equations that commonly arise in computer-based 3D modeling of real-world systems (e.g., 3D modeling of oil or gas reservoirs, etc.). A novel technique is proposed for application of a multi-level preconditioning strategy to an original matrix that is partitioned and transformed to block bordered diagonal form. An approach for deriving a preconditioner for use in parallel iterative solution of a linear system of equations is provided. In particular, a parallel-computing iterative solver may derive and/or apply such a preconditioner for use in solving, through parallel processing, a linear system of equations.
摘要:
Full-AC load flow constitutes a core computation in power system analysis. The present invention provides a performance gain with a hardware implementation of a sparse-linear solver using a Field Programmable Gate Array (FPGA). The invention also relates to the design, simulation, and hardware verification of a static transmission line model for analog power flow computation. Operational transconductance amplifiers are employed in the model based on a previously proposed DC emulation technique of power flow computation, and provide reconfigurability of transmission line parameters via transconductance gain. The invention also uses Analog Behavioral Models (ABMs) in an efficient strategy for designing analog emulation engines for large-scale power system computation. Results of PSpice simulations of these emulation circuits are compared with industrial grade numerical simulations for validation. The application is also concerned with the development of a generator model using analog circuits for load flow emulation for power system analysis to reduce computation time. The generator model includes reconfigurable parameters using operational transconductance amplifiers (OTAs). The circuit module is used with other reconfigurable circuits, i.e., transmission lines and loads.
摘要:
Disclosed is a V-BLAST system for a MIMO communication system.In the V-BLAST system for a MIMO communication system, a pseudo inverse matrix calculator receives a channel transfer function matrix including channel information and produces a cofactor matrix and a determinant for a pseudo inverse matrix. A norm & minimum calculator calculates a minimum index for the cofactor matrix outputted from the pseudo inverse matrix calculator, a weight vector selector selects a row vector having the minimum index and calculates a transposed matrix for the row vector; an adder adds the transposed matrix to a received input symbol, and a subtractor subtracts the determinant to the output. A demapper performs a determined function operation to the output and produces estimated information.
摘要:
A method and structure for an in-place transformation of matrix data. For a matrix A stored in one of a standard full format or a packed format and a transformation T having a compact representation, blocking parameters MB and NB are chosen, based on a cache size. A sub-matrix A1 of A, A1 having size M1=m*MB by N1=n*NB, is worked on, and any of a residual remainder of A is saved in a buffer B. Sub-matrix A1 is worked on by contiguously moving and contiguously transforming A1 in-place into a New Data Structure (NDS), applying the transformation T in units of MB*NB contiguous double words to the NDS format of A1, thereby replacing A1 with the contents of T(A1), and moving and transforming NDS T(A1) to standard data format T(A1) with holes for the remainder of A in buffer B. The contents of buffer B is contiguously copied into the holes of A2, thereby providing in-place transformed matrix T(A).
摘要翻译:矩阵数据的就地转换的方法和结构。 对于以标准全格式或打包格式之一存储的矩阵A和具有紧凑表示的变换T,基于高速缓存大小来选择阻塞参数MB和NB。 对于具有M1 = m * MB的N1 = n * NB的A的A1的矩阵A1进行加工,并且A的剩余余数中的任一个保存在缓冲器B中。子矩阵A1由 将A1原位连续移动并连续地转换为新数据结构(NDS),将以MB * NB连续双字为单位的变换T应用于A1的NDS格式,从而将A1替换为T(A1)的内容, 并且将NDS T(A1)移动并变换为具有用于缓冲器B中的剩余部分的空穴的标准数据格式T(A1)。缓冲器B的内容被连续地复制到A2的孔中,从而提供就地变换矩阵T (一个)。
摘要:
A Matrix decomposition (LU decomposition) is carried out on a block E and H. Then, a block B is updated using an upper triangular portion of the block E, and a block D is updated using a lower triangular portion of the block E. At this time, in an LU decomposition, blocks F and I have been updated. Then, using the blocks B, D, F, and H, blocks A, C, G, and I are updated, an upper triangular portion of the block E is updated, and finally, the blocks D and F are updated. Then, the second updating process is performed on the block E. Using the result of the process, the blocks B and H are updated. Finally, the block E is updated, and the pivot interchanging process is completed, thereby terminating the process. These processes on the blocks are performed in a plurality of divided threads in parallel.