公开(公告)号：US06344984B1

公开(公告)日：2002-02-05

申请号：US09653864

申请日：2000-09-01

申请人： Kiyoshi Miyazaki

发明人： Kiyoshi Miyazaki

IPC分类号： H02M318

CPC分类号： G09G3/3696 ,  G09G3/3622 ,  G09G2330/021 ,  H02M3/07 ,  H02M2001/009

摘要： A power supply circuit for use in a LCD device includes a voltage multiplier which outputs a multiplied voltage VLCD1 and a median voltage VLCD2. A plurality of voltage followers are grouped in two groups each operating on the multiplied voltage VLCD1 or the median voltage VLCD2, thereby reducing power dissipation of the LCD device.

摘要翻译： 用于LCD装置的电源电路包括输出倍增电压VLCD1和中值VLCD2的电压倍增器。 多个电压跟随器被分成两组，分别在倍增电压VLCD1或中值VLCD2上工作，从而降低了LCD器件的功耗。

公开(公告)号：US06272029B1

公开(公告)日：2001-08-07

申请号：US09493987

申请日：2000-01-28

申请人： Ryan T. Hirose

发明人： Ryan T. Hirose

IPC分类号： H02M318

CPC分类号： G11C5/145

摘要： The present invention involves a charge pump including an input node coupled to receive an input voltage from a power voltage source and an oscillator unit generates a periodic enable regulator signal and a periodic reset signal. A regulator clock unit is coupled to the oscillator unit generating a precharge (PC) signal and a reset regulator signal in response to the enable regulator signal. A pump clock unit receives a master clock signal and generating a plurality of pump clock signals. A charge pump unit is coupled to the input node and is operatively controlled by the plurality of pump clock signals, and coupled to the an output terminal coupled to produce an output signal (VPUMP). A regulator unit is coupled to receive the VPUMP signal, the PC signal, the reference signal and the enable regulator signal, where the regulator unit is responsive to the enable regulator signal to operate in either a precharge mode or a regulation mode.

摘要翻译： 本发明涉及一种电荷泵，其包括耦合以从电源电压源接收输入电压的输入节点，并且振荡器单元产生周期性使能调节器信号和周期性复位信号。 调节器时钟单元耦合到振荡器单元，响应于使能调节器信号产生预充电（PC）信号和复位调节器信号。 泵时钟单元接收主时钟信号并产生多个泵时钟信号。 电荷泵单元耦合到输入节点并且由多个泵浦时钟信号可操作地控制，并且耦合到耦合以产生输出信号（VPUMP）的输出端子。 耦合调节器单元以接收VPUMP信号，PC信号，参考信号和使能调节器信号，其中调节器单元响应于使能调节器信号在预充电模式或调节模式下操作。

公开(公告)号：US06226194B1

公开(公告)日：2001-05-01

申请号：US09595302

申请日：2000-06-15

申请人： Erich Bayer ,  Hans Schmeller

发明人： Erich Bayer ,  Hans Schmeller

IPC分类号： H02M318

CPC分类号： H02M3/07 ,  H02M1/32 ,  H02M1/36

摘要： The invention relates to a DC/DC converter operating on the principle of a charge pump and comprising a first capacitor C1 alternatingly charged via four MOSFETs M1-M4 to the input voltage and then discharged in series with the input voltage via a second capacitor C2 connected to the output of the circuit. To set the starting current for charging the as yet empty capacitors to a precisely defined small value a switchable current mirror M3, M5 is used comprising one of the four MOSFETs (M3) and a further small MOSFET (M5) which is connected to a current source 4. A comparator 5 handles selection between the starting phase and the normal charge pump mode by comparing the output voltage Vout of the converter to a reference voltage Vref, it switching the current mirror and—via two small switches S2 and S3 connected to the gates of two of the four MOSFETs—also two of the four MOSFETs so that the capacitors may be charged in an energy-saving way. As compared to existing more complicated achievements this novel DC/DC converter is producable integrated on a smaller circuit area, it in addition to this taking into account the short-circuit case of the converter. In one special embodiment a foldback effect is achievable via a further MOSFET connected in parallel to the current source, the gate of this MOSFET being connected to the output of the converter.

摘要翻译： 本发明涉及一种以电荷泵原理工作的DC / DC转换器，它包括经由四个MOSFET M1-M4交替充电至输入电压的第一电容器C1，然后通过连接的第二电容器C2与输入电压串联放电 到电路的输出。 为了将用于将空的电容器充电至精确定义的小值的启动电流，使用可切换电流镜M3，M5，其包括四个MOSFET（M3）中的一个以及连接到电流的另一小型MOSFET（M5） 比较器5通过将转换器的输出电压Vout与参考电压Vref进行比较来处理起始相位和正常电荷泵模式之间的选择，它切换电流镜和经由两个小型开关S2和S3连接到 四个MOSFET中的两个的栅极 - 也是四个MOSFET中的两个，使得电容器可以以节能的方式被充电。 与现有更复杂的成果相比，这款新颖的DC / DC转换器可以集成在更小的电路面积上，除了考虑到转换器的短路情况外。 在一个特殊实施例中，通过与电流源并联连接的另一个MOSFET可实现折返效应，该MOSFET的栅极连接到转换器的输出端。

公开(公告)号：US06198645B1

公开(公告)日：2001-03-06

申请号：US09322264

申请日：1999-05-28

申请人： Jeff Kotowski ,  William J. McIntyre

发明人： Jeff Kotowski ,  William J. McIntyre

IPC分类号： H02M318

CPC分类号： H02M3/18 ,  H02M3/07 ,  H02M2003/072

摘要： A structure and process are provided for converting DC-DC voltages, which allows both buck and boost conversion utilizing a single switched capacitor array. In one embodiment of this invention, the switched capacitor array comprises multiple gain blocks, where the gain blocks are identical and stacked upon each other. The switches and capacitors are configured so that various combinations of series and parallel capacitor connections are possible, and thus both buck and boost conversions are attainable with one switched capacitor array. Other embodiments of the present invention use multiple gain blocks, configured such that the capacitor in each gain block can be connected to ground. As a result, a single charge state for a range of desired gains can be configured for use with a shared or common rest state, i.e., a capacitor configuration which is the same regardless of the desired gain. In the charge state, selected capacitors are configured in series for the desired gain setting, while in the shared rest state, all the capacitors are configured in parallel from the output to the input. Because a shared rest state is used, the correct charge is always transferred at the desired gain with a single switched capacitor array.

摘要翻译： 提供了一种用于转换DC-DC电压的结构和过程，其允许使用单个开关电容器阵列的降压和升压转换。 在本发明的一个实施例中，开关电容器阵列包括多个增益块，其中增益块彼此相同并堆叠。 开关和电容器被配置为使得串联和并联电容器连接的各种组合是可能的，因此可以通过一个开关电容器阵列实现降压和升压转换。 本发明的其他实施例使用多个增益块，其被配置为使得每个增益块中的电容器可以连接到地。 结果，对于期望增益范围的单个充电状态可以被配置为用于共享或共用静止状态，即不管期望增益如何，电容器配置是相同的。 在充电状态下，所选择的电容器被串联配置用于期望的增益设置，而在共享静止状态下，所有电容器从输出到输入并联配置。 由于使用共享休眠状态，所以正确的电荷总是以所需的增益转换为单个开关电容器阵列。

公开(公告)号：US06188590B1

公开(公告)日：2001-02-13

申请号：US08860151

申请日：1997-06-17

申请人： Kuen-Long Chang ,  Chun-Hsiung Hung ,  Weitong Chuang

发明人： Kuen-Long Chang ,  Chun-Hsiung Hung ,  Weitong Chuang

IPC分类号： H02M318

CPC分类号： H02M3/073 ,  H02M2003/076

摘要： The present invention discloses a regulator system (112) for regulating the output current and voltage (Vout) of a charge pump circuit (104). It is observed that the output current and voltage (Vout) of a charge pump circuit (104) can be regulated by varying the amplitude and frequency of a set of clock signals (modulated clocks). The present invention comprises means (decoders 1, 2; AM, FM units) for generating a set of control signals (VAD1-VFDn) as the function of the output current and voltage (Vout). The set of control signals (VAD1-VFDn) is coupled to a clock signal generation circuit (130) that generates a set of clock signals (modulated clocks) having a magnitude and a frequency depending on this set of at least one control signal. This set of clock signals (modulated clocks) is then used to drive the charge pump circuit (104). It is found that this regulator circuit (112) consumes less power than prior art regulator circuits.

摘要翻译： 本发明公开了一种用于调节电荷泵电路（104）的输出电流和电压（Vout）的调节器系统（112）。 观察到可以通过改变一组时钟信号（调制时钟）的幅度和频率来调节电荷泵电路（104）的输出电流和电压（Vout）。 本发明包括用于产生作为输出电流和电压（Vout）的函数的一组控制信号（VAD1-VFDn）的装置（解码器1,2，AM，FM单元）。 该组控制信号（VAD1-VFDn）耦合到时钟信号产生电路（130），该时钟信号产生电路产生具有取决于该组至少一个控制信号的幅度和频率的一组时钟信号（调制时钟）。 然后，该组时钟信号（调制时钟）用于驱动电荷泵电路（104）。 发现该调节器电路（112）比现有技术的调节器电路消耗更少的功率。

公开(公告)号：US06181584B2

公开(公告)日：2001-01-30

申请号：US09534532

申请日：2000-03-27

申请人： Norio Koizumi ,  Masahiko Tsuchiya

发明人： Norio Koizumi ,  Masahiko Tsuchiya

IPC分类号： H02M318

CPC分类号： G09G3/3696 ,  G09G2330/021 ,  G09G2330/027

摘要： A semiconductor device that is capable of preventing erroneous operation such as momentary lighting, having a booster circuit to which first and second power supply potentials VDD and VSS are supplied from an external power source, for boosting the absolute value of the potential difference therebetween and charging the boosted potential to a capacitor. This booster circuit has a plurality of transistors and a plurality of capacitors, and the boosted potential is charged to one of the plurality of capacitors in accordance with how the plurality of transistors are turned on or off. The gates of a plurality of transistors are connected to output lines of first and second NAND circuits, to which the output of a comparator is input through a buffer. The output of the comparator is at a low level when the second power supply potential VSS is higher than a reference potential VREG, such as when the power is forcibly cut, in which case the charge in one of the plurality of capacitors is discharged, based on the outputs from the first and second NAND circuits.

摘要翻译： 一种半导体装置，其能够防止诸如瞬时点亮的错误操作，具有从外部电源向第一和第二电源电位VDD和VSS提供的升压电路，用于升高其间的电位差的绝对值并充电 电容器的电位升高。 该升压电路具有多个晶体管和多个电容器，并且根据多个晶体管的导通或截止的方式将升压电位充电到多个电容器中的一个。 多个晶体管的栅极连接到第一和第二NAND电路的输出线，比较器的输出通过缓冲器输入到其中。 当第二电源电位VSS高于基准电位VREG时，比较器的输出处于低电平，例如当电源被强制切断时，在这种情况下，多个电容器之一中的电荷基于放电 在第一和第二NAND电路的输出上。

公开(公告)号：US06759766B2

公开(公告)日：2004-07-06

申请号：US10315153

申请日：2002-12-10

申请人： Masashi Hiratsuka ,  Kunihiro Takahashi ,  Yoshinao Kondoh

发明人： Masashi Hiratsuka ,  Kunihiro Takahashi ,  Yoshinao Kondoh

IPC分类号： H02M318

CPC分类号： B41J2/04541 ,  B41J2/04548 ,  B41J2/04581

摘要： A power supply apparatus includes a boost circuit and a switch circuit. The boost circuit has rectifying elements and charge storage elements associated with the rectifying elements, and outputs a boosted voltage by sequentially cumulating charges in the charge storage elements in accordance with an AC input signal. The switch circuit switches a polarity of boosting in cumulating the charges in the charge storage elements. The boost circuit includes a circuit part that supplies charges to be sequentially cumulated in positive and negative directions in accordance with the AC input signal.

摘要翻译： 电源装置包括升压电路和开关电路。 升压电路具有与整流元件相关联的整流元件和电荷存储元件，并且通过根据AC输入信号依次累积电荷存储元件中的电荷而输出升压电压。 开关电路在累积电荷存储元件中的电荷时切换升压的极性。 升压电路包括根据AC输入信号在正向和负向依次累加的电荷的电路部分。

公开(公告)号：US06738272B2

公开(公告)日：2004-05-18

申请号：US10124354

申请日：2002-04-16

申请人： Junko Yamanaka ,  Toshiki Ishii ,  Katsunori Kimura

发明人： Junko Yamanaka ,  Toshiki Ishii ,  Katsunori Kimura

IPC分类号： H02M318

CPC分类号： H02M3/07 ,  Y10S323/908

摘要： In a charge pump circuit, a constant current circuit is disposed between an input power supply and an output capacitor, when a power supply is started to turn on, the operation of the charge pump circuit is stopped, and the output capacitor is charged up to a given voltage by the constant current circuit, and thereafter the normal operation of the charge pump is started to limit the rush current. When the power supply is started, the operation is conducted by an oscillator circuit having a small duty ratio, and thereafter the control is replaced by the PFM control having the normal duty ratio, to thereby reduce the rush current as compared with that of the conventional PFM control. When the power supply is started, a pre-driver including a current limiting element is used to drive a driver, resulting in such an advantage that the rush current is reduced as compared with that driven by the conventional pre-driver.

摘要翻译： 在电荷泵电路中，在输入电源和输出电容器之间设置恒流电路，当电源开始接通时，电荷泵电路的动作停止，输出电容充电至 通过恒流电路的给定电压，然后开始电荷泵的正常操作以限制冲击电流。 当电源启动时，通过占空比小的振荡电路进行动作，之后用具有正常占空比的PFM控制代替控制，从而与现有技术相比减小了冲击电流 PFM控制。 当电源启动时，使用包括限流元件的预驱动器来驱动驱动器，从而产生与传统的前驱动器驱动相比冲击电流降低的优点。

公开(公告)号：US06542001B1

公开(公告)日：2003-04-01

申请号：US09835616

申请日：2001-04-10

申请人： Ho-Yuan Yu

发明人： Ho-Yuan Yu

IPC分类号： H02M318

CPC分类号： H01L27/098 ,  H01L27/1203 ,  H02M3/00 ,  H02M3/07

摘要： This invention discloses the concept of the integration of the four terminal switcher and the capacitor pairs for the DC to DC converter or power supplier. This invention can be built by IC process as the DC to DC converter or power supply alone or used as power supply or converter module or block for distributed power in the System-on-Chip. This invention discloses the basic structure of the DC to DC converter or power supply module on standard CMOS IC process and on SOI substrates. This basic structure of the DC to DC converter or power supply module provides high current and low voltage applications for future generations of ICs.

摘要翻译： 本发明公开了用于DC到DC转换器或电源的四端开关和电容器对的集成的概念。 本发明可以通过IC工艺作为DC-DC转换器或电源单独构建，或者用作片上系统中的用于分布式电力的电源或转换器模块或块。 本发明公开了在标准CMOS IC工艺和SOI衬底上的DC-DC转换器或电源模块的基本结构。 DC到DC转换器或电源模块的这种基本结构为后代的IC提供了高电流和低电压应用。

公开(公告)号：US06466079B1

公开(公告)日：2002-10-15

申请号：US09888353

申请日：2001-06-21

申请人： Alexander Kushnarenko

发明人： Alexander Kushnarenko

IPC分类号： H02M318

CPC分类号： H02M3/07

摘要： An output stage for a charge pump is provided that includes a first PMOS transistor, a second PMOS transistor, a pull-down transistor and a capacitor. The first PMOS transistor includes a source and a bulk region coupled to receive a charging signal, a drain coupled to a first node, and a gate coupled to receive a switching signal. The second PMOS transistor has a drain coupled to the first node, a gate coupled to receive the switching signal, and a source and a bulk region coupled to an output terminal. The capacitor is coupled between the output terminal and the ground voltage supply terminal, and charges when the first and second PMOS transistors are turned on. The pull-down transistor is configured to discharge the first node at the end of each charging cycle, thereby preventing drain-to-bulk junctions of the PMOS transistors from being forward biased during normal operation.

摘要翻译： 提供了一种用于电荷泵的输出级，其包括第一PMOS晶体管，第二PMOS晶体管，下拉晶体管和电容器。 第一PMOS晶体管包括耦合以接收充电信号的源极和体区，耦合到第一节点的漏极和耦合以接收开关信号的栅极。 第二PMOS晶体管具有耦合到第一节点的漏极，耦合以接收切换信号的栅极，以及耦合到输出端子的源极和体区域。 电容器耦合在输出端子和接地电压端子之间，并且当第一和第二PMOS晶体管导通时进行充电。 下拉晶体管被配置为在每个充电周期结束时对第一节点进行放电，从而防止在正常操作期间PMOS晶体管的漏 - 体结的正向偏置。