-
1.发明授权Measuring and controlling current consumption and output current of charge pumps 有权测量和控制电荷泵的电流消耗和输出电流公开(公告)号：US07605579B2
公开(公告)日：2009-10-20
申请号：US11602222
申请日：2006-11-21
CPC分类号： H02M3/073 , H02M2001/0009
摘要： The present invention is a method and apparatus for regulating current consumption and output current of a charge pump. According to some embodiments of the present invention, a first current coming into the charge pump and a second current coming into a driver of at least one of one or more stages of the charge pump is measured. A control loop may regulate one or more parameters of the charge pump and/or a load connected to the charge pump, such as by adjusting one or more of: a supply voltage; a stage's voltage; the stage's frequency and/or duty-cycle; and the number of stages.
摘要翻译： 本发明是用于调节电荷泵的电流消耗和输出电流的方法和装置。 根据本发明的一些实施例，测量进入电荷泵的第一电流和进入电荷泵的一个或多个级中的至少一个的驱动器的第二电流。 控制回路可以调节电荷泵的一个或多个参数和/或连接到电荷泵的负载，例如通过调节以下的一个或多个：电源电压; 舞台的电压; 舞台的频率和/或占空比; 和阶段数。
-
2.发明申请Measuring and controlling current consumption and output current of charge pumps 有权测量和控制电荷泵的电流消耗和输出电流公开(公告)号：US20080094127A1
公开(公告)日：2008-04-24
申请号：US11602222
申请日：2006-11-21
IPC分类号： G05F1/10
CPC分类号： H02M3/073 , H02M2001/0009
摘要： Measuring and controlling current consumption and output current of a charge pump by measuring a first current coming into the charge pump; and measuring a second current coming into a driver for at least one of the one or more stages of the charge pump. A control loop may one or more parameters of the charge pump and/or a load connected to the charge pump, such as by adjusting one or more of: a supply voltage; a stage's voltage; the stage's frequency and/or duty-cycle; and the number of stages, or by decreasing the current consumption by adjusting a load connected to the output of the charge pump pipe. The first and second currents may be compared with first and second reference currents. A load connected to the charge pump may comprise non-volatile memory cells, and the charge pump may be implemented on a same integrated circuit chip as the memory cells.
摘要翻译： 通过测量进入电荷泵的第一电流来测量和控制电荷泵的电流消耗和输出电流; 以及测量进入所述电荷泵的所述一个或多个阶段中的至少一个的驱动器的第二电流。 控制回路可以是电荷泵的一个或多个参数和/或连接到电荷泵的负载，例如通过调节以下的一个或多个：电源电压; 舞台的电压; 舞台的频率和/或占空比; 或通过调节连接到电荷泵管的输出的负载来减小电流消耗。 可以将第一和第二电流与第一和第二参考电流进行比较。 连接到电荷泵的负载可以包括非易失性存储器单元，并且电荷泵可以在与存储器单元相同的集成电路芯片上实现。
-
公开(公告)号：US20050174709A1
公开(公告)日：2005-08-11
申请号：US10986799
申请日：2004-11-15
申请人： Alexander Kushnarenko , Ifat Nitzan
发明人： Alexander Kushnarenko , Ifat Nitzan
摘要： A load adjustment circuit and a method for adjusting a load are provided. The circuit may include a power source to supply power to a load, and a control unit to control a property of the load. The control unit may be adapted to adjust a property of the load based on a signal received from the power source. The method may include supplying power to a load and adjusting a property of the load to decrease the power supplied to the load if the power supplied to the load is greater than a maximum threshold.
摘要翻译： 提供负载调整电路和负载调整方法。 电路可以包括向负载供电的电源，以及控制负载的性质的控制单元。 控制单元可以适于基于从电源接收的信号来调整负载的属性。 如果提供给负载的功率大于最大阈值，该方法可以包括向负载供电并调整负载的性质以减小供应给负载的功率。
-
公开(公告)号：US20050174152A1
公开(公告)日：2005-08-11
申请号：US10774806
申请日：2004-02-10
IPC分类号： H03B1/00 , H03K17/16 , H03K19/003 , H03K19/0185
CPC分类号： H03K19/018585 , H03K17/164
摘要： A power driver circuit is provided including a low voltage source, a high voltage source, at least one input signal line, an output node, and circuitry adapted to connect the output node to the low voltage source when the input signal line is in a first state and to the high voltage source when said input signal line is in a second state.
摘要翻译： 提供了一种功率驱动器电路，包括低电压源，高电压源，至少一个输入信号线，输出节点和适于将输出节点连接到低电压源的电路，当输入信号线处于第一 并且当所述输入信号线处于第二状态时与所述高电压源连接。
-
公开(公告)号：US07176728B2
公开(公告)日：2007-02-13
申请号：US10774806
申请日：2004-02-10
IPC分类号： H03B1/00
CPC分类号： H03K19/018585 , H03K17/164
摘要： A power driver circuit is provided including a low voltage source, a high voltage source, at least one input signal line, an output node, and circuitry adapted to connect the output node to the low voltage source when the input signal line is in a first state and to the high voltage source when said input signal line is in a second state.
摘要翻译： 提供了一种功率驱动器电路，包括低电压源，高电压源，至少一个输入信号线，输出节点和适于将输出节点连接到低电压源的电路，当输入信号线处于第一 并且当所述输入信号线处于第二状态时与所述高电压源连接。
-
公开(公告)号：US06532176B1
公开(公告)日：2003-03-11
申请号：US09963912
申请日：2001-09-25
IPC分类号： G11C1606
CPC分类号： G11C7/12 , G11C16/24 , G11C2207/12
摘要： A non-volatile memory (NVM) system that includes an array of NVM cells arranged in rows and columns and an equalization control circuit is provided. One row of the array forms a row of equalization NVM cells. Each of the equalization NVM cells is erased, such that these cells exhibit a low threshold voltage during normal operation of the array. The equalization control circuit detects the beginning of each new read cycle, and in response, activates an equalization control signal. The activated equalization control signal is applied to the row of equalization NVM cells, thereby turning on these cells. The turned on equalization NVM cells connect the bit lines of the array, thereby allowing the bit lines to discharge (equalize) at the beginning of each read cycle. The equalization control signal is de-activated prior to the bit line sensing period of the read cycle.
摘要翻译： 提供了一种非易失性存储器（NVM）系统，其包括排列成行和列的NVM单元阵列和均衡控制电路。 该阵列的一行形成一排均衡NVM单元。 每个均衡NVM单元被擦除，使得这些单元在阵列的正常操作期间呈现低阈值电压。 均衡控制电路检测每个新的读周期的开始，并且作为响应，激活均衡控制信号。 激活的均衡控制信号被施加到均衡NVM单元的行，从而接通这些单元。 导通均衡NVM单元连接阵列的位线，从而允许位线在每个读取周期开始时放电（均衡）。 在读周期的位线检测周期之前，均衡控制信号被去激活。
-
7.发明授权High voltage charge pump for providing output voltage close to maximum high voltage of a CMOS device 有权高压电荷泵，用于提供接近CMOS器件最大高压的输出电压公开(公告)号：US06466079B1
公开(公告)日：2002-10-15
申请号：US09888353
申请日：2001-06-21
IPC分类号： H02M318
CPC分类号： H02M3/07
摘要： An output stage for a charge pump is provided that includes a first PMOS transistor, a second PMOS transistor, a pull-down transistor and a capacitor. The first PMOS transistor includes a source and a bulk region coupled to receive a charging signal, a drain coupled to a first node, and a gate coupled to receive a switching signal. The second PMOS transistor has a drain coupled to the first node, a gate coupled to receive the switching signal, and a source and a bulk region coupled to an output terminal. The capacitor is coupled between the output terminal and the ground voltage supply terminal, and charges when the first and second PMOS transistors are turned on. The pull-down transistor is configured to discharge the first node at the end of each charging cycle, thereby preventing drain-to-bulk junctions of the PMOS transistors from being forward biased during normal operation.
摘要翻译： 提供了一种用于电荷泵的输出级，其包括第一PMOS晶体管，第二PMOS晶体管，下拉晶体管和电容器。 第一PMOS晶体管包括耦合以接收充电信号的源极和体区，耦合到第一节点的漏极和耦合以接收开关信号的栅极。 第二PMOS晶体管具有耦合到第一节点的漏极，耦合以接收切换信号的栅极，以及耦合到输出端子的源极和体区域。 电容器耦合在输出端子和接地电压端子之间，并且当第一和第二PMOS晶体管导通时进行充电。 下拉晶体管被配置为在每个充电周期结束时对第一节点进行放电，从而防止在正常操作期间PMOS晶体管的漏 - 体结的正向偏置。
-
8.发明授权Circuit and method for powering up an integrated circuit and an integrated circuit utilizing same 有权用于为集成电路供电的电路和方法以及利用该集成电路的集成电路公开(公告)号：US08253452B2
公开(公告)日：2012-08-28
申请号：US11357081
申请日：2006-02-21
IPC分类号： H03L7/00
CPC分类号： G05F3/30
摘要： The present invention is a circuit and method for providing a reference voltage and/or one or more circuit/circuit-block enabling signals for an IC. As the voltage level on a power supply line ramps upward towards or above a nominal operating voltage, a first threshold voltage detector circuit segment may be activated and may begin to generate a bandgap reset signal once the voltage level of the power supply reaches a first threshold voltage level. The bandgap reset signal may trigger the power-up and operation of a bandgap reference circuit segment, and according to further embodiments of the present invention, a second threshold voltage detector circuit segment, which second threshold voltage detector circuit segment may be matched with the first voltage detector circuit, may generate a voltage reset signal indicating that the bandgap reference source is powering-up. Once the supply voltage reaches a third threshold reference voltage, the first detector may disable the bandgap reset.
摘要翻译： 本发明是一种用于为IC提供参考电压和/或一个或多个电路/电路块使能信号的电路和方法。 随着电源线上的电压电平向上或向标称工作电压上升，第一阈值电压检测器电路段可被激活，并且一旦电源的电压电平达到第一阈值就可开始产生带隙复位信号 电压电平。 带隙复位信号可以触发带隙参考电路段的上电和操作，并且根据本发明的另外的实施例，第二阈值电压检测器电路段，该第二阈值电压检测器电路段可以与第一阈值电压检测器电路段匹配 电压检测器电路可以产生指示带隙参考源上电的电压复位信号。 一旦电源电压达到第三阈值参考电压，第一个检测器可能会禁用带隙复位。
-
9.发明授权Method, device and system for regulating access to an integrated circuit (IC) device 有权用于调节对集成电路（IC）装置的访问的方法，装置和系统公开(公告)号：US07864606B2
公开(公告)日：2011-01-04
申请号：US12232495
申请日：2008-09-18
IPC分类号： G11C29/00
CPC分类号： G11C29/48 , G11C29/1201 , G11C29/14
摘要： A circuit block access module (ICAM) residing on an integrated circuit and adapted to access a circuit block on the integrated circuit, the module comprising control logic adapted to extract data from a serial data line into two or more parallel data lines, wherein at least one of the parallel data lines is associated with a circuit block address line; and the control logic is further adapted to override or bypass at least a portion of a primary control circuit of said integrated circuit.
摘要翻译： 一种位于集成电路上并适于访问集成电路上的电路块的电路块访问模块（ICAM），该模块包括适于将数据从串行数据线提取到两个或更多个并行数据线中的控制逻辑，其中至少 并行数据线之一与电路块地址线相关联; 并且所述控制逻辑还适于覆盖或旁路所述集成电路的主控制电路的至少一部分。
-
10.发明申请Method, device and system for regulating access to an integrated circuit (IC) device 有权用于调节对集成电路（IC）装置的访问的方法，装置和系统公开(公告)号：US20090097345A1
公开(公告)日：2009-04-16
申请号：US12232495
申请日：2008-09-18
IPC分类号： G11C29/00
CPC分类号： G11C29/48 , G11C29/1201 , G11C29/14
摘要： A circuit block access module (ICAM) residing on an integrated circuit and adapted to access a circuit block on the integrated circuit, the module comprising control logic adapted to extract data from a serial data line into two or more parallel data lines, wherein at least one of the parallel data lines is associated with a circuit block address line; and the control logic is further adapted to override or bypass at least a portion of a primary control circuit of said integrated circuit.
摘要翻译： 一种位于集成电路上并适于访问集成电路上的电路块的电路块访问模块（ICAM），该模块包括适于将数据从串行数据线提取到两个或更多个并行数据线中的控制逻辑，其中至少 并行数据线之一与电路块地址线相关联; 并且所述控制逻辑还适于覆盖或旁路所述集成电路的主控制电路的至少一部分。
-
-
-
-
-
-
-
-
-
搜索结果
21 条记录 (耗时 0.021 秒)
