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    Electronic random-access slide projector controller
    21.
    发明授权
    Electronic random-access slide projector controller 失效
    电子随体镜投影机控制器

    公开(公告)号：US3814909A

    公开(公告)日：1974-06-04

    申请号：US33559573

    申请日：1973-02-26

    Applicant: GEN ELECTRIC

    Inventor： HEWITT T

    IPC: G03B23/02 ,  G06K17/00 ,  H03M7/12 ,  G06M3/02

    CPC classification number: G03B23/02 ,  G06K17/0016 ,  H03M7/12

    Abstract: The controller includes multi two-input exclusive-OR gates having first inputs supplied with a two-digit BCD-coded signal representing the desired number of a slide to be selected for viewing in a random-access slide projector. Second inputs to the OR gates are connected to outputs of base 10 ''''tens'''' and ''''ones'''' counters which count clock pulses in response to a START command signal. Coincidence of the inputs to the OR gates causes a control logic circuit to terminate the generation of the clock pulses which are also counted by two N base (other-than-10) counters. The N base corresponds to the number of rows or columns in a code matrix used to specify the slide numbers. The outputs of the two N base counters are supplied to two one-of-N decoders each of which provides one output signal that identifies the particular row and column in the code matrix which specifies the desired slide location. Interface circuits at the outputs of the decoders provide the proper voltage level of voltage signals applied to the projector mechanism for searching the projector slide tray for the desired slide.

    Abstract translation: 控制器包括多个双输入异或门，其中第一输入端被提供有两位数字BCD编码信号，表示要在随机存取幻灯机中观看的幻灯片的所需数量。 OR门的第二个输入连接到基于10位的“十”和“一”计数器的输出端，这些计数器响应于START命令信号对时钟脉冲进行计数。 输入到或门的一致性导致控制逻辑电路终止时钟脉冲的产生，这些脉冲也由两个N个基准（其他十个）计数器计数。 N base对应于用于指定幻灯片编号的代码矩阵中的行数或列数。 两个N个基本计数器的输出被提供给两个N个解码器，每个N个解码器提供一个输出信号，该输出信号标识指定期望的滑动位置的代码矩阵中的特定行和列。 解码器输出端的接口电路提供了适用于投影机构的电压信号的电压电平，用于搜索投影机滑块以获得所需的滑块。

    Data conversion and recording apparatus
    22.
    发明授权
    Data conversion and recording apparatus 失效
    数据转换和记录设备

    公开(公告)号：US3740721A

    公开(公告)日：1973-06-19

    申请号：US3740721D

    申请日：1971-07-20

    Applicant: CLINE G

    Inventor： CLINE G

    IPC: H03M7/12 ,  G06F1/00

    CPC classification number: H03M7/12

    Abstract: A data conversion and recording apparatus is provided wherein data in either decimal or binary form may be received and converted into a selected code before being recorded. An encoding means in the form of a disc, drum or tape is used to sequentially generate all of the characters in a given code for each input signal, and a coincidence means is provided for selecting from the encoding means the code character which corresponds to the particular input signal. The detection of a coincidence between the code character appearing on the encoding means and the signal applied to one of the input terminals causes that code character to be stored and be subsequentially recorded on a recording means. The encoding means is of a form which can be readily interchanged so as to enable a given input signal to be selectively encoded in any of a plurality of codes.

    Abstract translation: 提供了一种数据转换和记录装置，其中可以在记录之前接收十进制或二进制形式的数据并将其转换成所选择的代码。 使用盘，磁带或磁带形式的编码装置，以顺序地产生每个输入信号的给定代码中的所有字符，并且提供一致符号装置，用于从编码装置中选择对应于 特定的输入信号。 检测出现在编码装置上的代码字符与施加到一个输入端子的信号之间的一致性导致该代码字符被存储并被后续地记录在记录装置上。 编码装置具有可以容易地互换的形式，以使给定的输入信号能够以多个代码中的任一个被有选择地编码。

    Five-bit binary to decimal translator
    23.
    发明授权
    Five-bit binary to decimal translator 失效
    十六进制翻译二进制

    公开(公告)号：US3636329A

    公开(公告)日：1972-01-18

    申请号：US3636329D

    申请日：1970-04-28

    Applicant: US NAVY

    Inventor： SIPIO RICHARD G DE ,  FINNEGAN PATRICK J

    IPC: H03M7/08 ,  H03M7/12 ,  H03K13/24

    CPC classification number: H03M7/08 ,  H03M7/12

    Abstract: A five-bit binary word is displayed as an alpha-numeric tens digit and an alpha-numeric units digit on adjacent seven-segment display tubes. The five-bit binary word is processed by a tens recognition system in order to obtain the tens digit corresponding to the value of the binary word. The tens digit is then converted to binary form and is displayed as a tens digit and is also subtracted from portions of the original five-bit binary word in order to obtain the value of the units digit in binary form. This value is then displayed as the units segment.

    Binary coded decimal to binary conversion apparatus
    24.
    发明授权
    Binary coded decimal to binary conversion apparatus 失效
    二进制码二进制转换为二进制转换器

    公开(公告)号：US3624375A

    公开(公告)日：1971-11-30

    申请号：US3624375D

    申请日：1969-12-15

    Applicant: SINGER CO

    Inventor： PROSS JOHN W JR

    IPC: H03M7/12 ,  H03K13/24

    CPC classification number: H03M7/12

    Abstract: A method and means for converting B.C.D. data into pure binary form by utilizing the arithmetic section of a general purpose digital computer. The conversion is based upon the computer''s multiply function wherein the binary-coded decimal information is treated as the multiplier and a preselected set of constants are used as multiplicand. That is, a separate constant for each digit to be converted is accessed from memory every four-word times and multiplied serially bit by bit by the four-binary-coded bits representing the decimal character, low order first. If the multiplier bit is a ''''one,'''' the multiplicand is added and becomes a partial product which, in turn, is stored in the computer''s ''''A'''' register or accumulator and shifted right onebit position. If the multiplier bit is a ''''zero'''' the previous partial product in the accumulator is merely shifted. The various constants or multiplicands are weighted so that each successive one is ten-sixteenths as large as its immediately preceding one.

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