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    ELECTRONIC DEVICE FOR RECOMMENDING COMPOSITION AND OPERATING METHOD THEREOF
    293.
    发明申请
    ELECTRONIC DEVICE FOR RECOMMENDING COMPOSITION AND OPERATING METHOD THEREOF 有权

    公开(公告)号：US20250133287A1

    公开(公告)日：2025-04-24

    申请号：US19001053

    申请日：2024-12-24

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Sungwook YOUN ,  Seoyoung LEE ,  Sehoon KIM ,  Daiwoong CHOI ,  Byungjun SON ,  Sungjoo AHN ,  Yanggeun OH ,  Taehwa HONG ,  Jiyoon PARK

    IPC: H04N23/60 ,  H04N23/63

    Abstract: An electronic device according to various embodiments may include: a display; an image sensor; and a processor configured to be operatively connected to the display and the image sensor. The processor may be configured to: display a first indicator at a specified position within a preview screen of the image sensor displayed on the display; identify a target on the preview screen; identify a target region corresponding to the identified target among a plurality of candidate target regions including the identified target on the basis of aesthetic scores assigned to the plurality of candidate target regions; display a second indicator corresponding to the identified target region on the preview screen; and when the second indicator is moved to the specified position, generate a photographic image corresponding to the preview screen at a specified time.

    COMMUNICATION METHOD AND DEVICE FOR EDGE COMPUTING SYSTEM
    294.
    发明申请
    COMMUNICATION METHOD AND DEVICE FOR EDGE COMPUTING SYSTEM 有权

    公开(公告)号：US20250133145A1

    公开(公告)日：2025-04-24

    申请号：US18833843

    申请日：2023-01-27

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Hyesung KIM ,  Cheolung LEE

    IPC: H04L67/148 ,  H04L67/10 ,  H04L67/51 ,  H04L67/62

    Abstract: The present disclosure relates to a 5G or 6G communication system for supporting higher data transmission rates. In a wireless communication system, a method performed by an edge enabler server (EES) comprises the steps of: receiving, from an edge enabler client (EEC), a request message including information related to a predicted movement path of a terminal including the EEC; and determining an application context storage time on the basis of information related to the predicted movement path of the terminal.

    PHASE-LOCKED LOOP CIRCUIT INCLUDING A PLURALITY OF CAPACITOR CELL ARRAYS WITH DIFFERENT CAPACITANCE CHANGES AND CONTROL METHOD THEREOF
    295.
    发明申请
    PHASE-LOCKED LOOP CIRCUIT INCLUDING A PLURALITY OF CAPACITOR CELL ARRAYS WITH DIFFERENT CAPACITANCE CHANGES AND CONTROL METHOD THEREOF 有权

    公开(公告)号：US20250132764A1

    公开(公告)日：2025-04-24

    申请号：US18884601

    申请日：2024-09-13

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Pillseong KANG ,  Chulho KIM ,  Sangmin YOO ,  Sangho LEE ,  Joonhee LEE ,  Ikkyun JO

    IPC: H03L7/099 ,  H03B5/12

    Abstract: A phase-locked loop (PLL) circuit comprising an oscillator including a first and a second capacitor cell array, each including a plurality of capacitor cells, and a control logic circuit connected to the oscillator. The control logic circuit configured to generate control code configured to control the oscillator such that the oscillator is configured to output a signal with a target frequency, the control code generated based on a first frequency of a first signal output from the oscillator and the target frequency, control at least some of capacitor cells included in the first capacitor cell array based on a first partial code generated based on a specified number of bits of the control code, and control at least some of capacitor cells included in the second capacitor cell array based on a second partial code generated based on bits other than the specified number of bits of the control code.

    ELECTRONIC DEVICE AND METHOD FOR CONTROLLING BATTERY
    296.
    发明申请
    ELECTRONIC DEVICE AND METHOD FOR CONTROLLING BATTERY 有权

    公开(公告)号：US20250132589A1

    公开(公告)日：2025-04-24

    申请号：US19007551

    申请日：2025-01-02

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Sangwoo KANG ,  Kyunghwan LEE

    IPC: H02J7/00

    Abstract: An electronic device according to various embodiments of the disclosure may include a first charging circuit connected to a first node and a second node, a second charging circuit connected to the first node and a third node, a switch connected to the second node and the third node, a battery connected to the second node, a system circuit connected to the third node, and a processor. In addition, various embodiments may be possible.

    SEMICONDUCTOR PACKAGE
    297.
    发明申请
    SEMICONDUCTOR PACKAGE 有权

    公开(公告)号：US20250132275A1

    公开(公告)日：2025-04-24

    申请号：US18909082

    申请日：2024-10-08

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Sangho Cha ,  Yunrae Cho

    IPC: H01L23/00 ,  H01L25/065 ,  H10B80/00

    Abstract: A semiconductor package includes a semiconductor substrate, connection pads on a bottom surface of the semiconductor substrate, and connection bumps respectively on the connection pads, wherein the connection bumps include an extension bump and a non-extension bump, wherein the extension bump includes an extension seed layer on a respective one of the connection pads and a first conductive pillar on the extension seed layer, and wherein the extension seed layer longitudinally extends in a first extension direction.

    SEMICONDUCTOR DEVICE
    298.
    发明申请
    SEMICONDUCTOR DEVICE 有权

    公开(公告)号：US20250132257A1

    公开(公告)日：2025-04-24

    申请号：US18650306

    申请日：2024-04-30

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Hyo Jin KIM ,  Dong Hoon HWANG ,  Min Chan GWAK

    IPC: H01L23/535 ,  H01L23/528 ,  H01L23/532 ,  H01L29/06 ,  H01L29/417 ,  H01L29/423 ,  H01L29/775

    Abstract: A semiconductor device may include a via pattern connected to a conductive pattern on a substrate, the via pattern including a lower via pattern and an upper via pattern stacked on the lower via pattern, and a wiring line connected to the upper via pattern and extending in a second direction. The wiring line may include a same metal as the upper via pattern. A bottom width of the wiring line may be greater than a top width of the wiring line. a widths of an upper face of the lower via pattern may be equal to width of the bottom face of the upper via pattern.

    SEMICONDUCTOR MEMORY DEVICE
    299.
    发明申请
    SEMICONDUCTOR MEMORY DEVICE 有权

    公开(公告)号：US20250132253A1

    公开(公告)日：2025-04-24

    申请号：US18625341

    申请日：2024-04-03

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Taejin PARK ,  Hyeonkyu LEE ,  Sungsoo YIM

    IPC: H01L23/528 ,  H10B12/00

    Abstract: A semiconductor memory device includes a conductive line extending in a first direction, first and second channel regions connected to the conductive line, contact plugs apart from the conductive line in a vertical direction with the first and second channel regions therebetween, a back gate electrode extending in a second direction perpendicular to the first direction between the first and second channel regions, and a back gate dielectric film covering surfaces of the back gate electrode, wherein the back gate dielectric film includes a vertical extension portion arranged between the back gate electrode and each of the first and second channel regions to cover sidewalls of the back gate electrode, and a horizontal extension portion connected integrally to the vertical extension portion and covering the back gate electrode at one position selected from a first position facing the conductive line and a second position facing the contact plugs.

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