公开(公告)号：US20220308173A1

公开(公告)日：2022-09-29

申请号：US17655727

申请日：2022-03-21

Applicant: STMICROELECTRONICS SA

Inventor： Olivier Pothier ,  Victor Macela ,  Thierry Lebihen ,  Arnaud Bourge

IPC: G01S7/48 ,  G01S17/89 ,  G01S7/487

Abstract: Method, having detecting from a first histogram signal delivered by a sensor device, successive sets of targets at respective successive instants, determining for a current set of current detected targets, a current histogram output, the current histogram output having for each current detected target of the current set, a current group of parameters stored in a memory including a confidence indicator, performing a matching operation between the current set of detected targets and previous sets of detected targets stored in the memory, and performing a filtering operation of at least one parameter of the current group of parameters of at least some of the current detected targets of the current set, on the basis of the result of the matching operation, the filtering operation being weighted on the basis of at least the confidence indicators of current and previous sets of detected targets.

公开(公告)号：US20220200659A1

公开(公告)日：2022-06-23

申请号：US17457561

申请日：2021-12-03

Applicant: STMICROELECTRONICS SA

Inventor： Julien Goulier

IPC: H04B5/00 ,  H04L27/04 ,  H04B17/10

Abstract: A contactless communication method comprises retro-modulation of a carrier signal received at the terminals of an antenna in an alternation of modulated states and unmodulated states. The modulated state comprises a modulation of a load at the terminals of the antenna at zero impedance, and the transitions from the modulated state to the unmodulated state are controlled at an instant determined by a first delay.

公开(公告)号：US20220199133A1

公开(公告)日：2022-06-23

申请号：US17556039

申请日：2021-12-20

Applicant: STMicroelectronics SA

Inventor： Faress TISSAFI DRISSI

IPC: G11C7/24 ,  G11C11/419

Abstract: A memory includes memory cells arranged in rows and in columns, with at least one bit line for each column being coupled to the memory cells of the column. A read/write circuit is coupled to the bit lines and is configured to receive, for each column, a binary datum to be stored in one of the memory cells of the column. The read/write circuit includes, for each column, a latch configured to store a bit of a key, and an encryption circuit configured to encrypt the received binary datum with the bit of the key to provide encrypted binary datum. The read/write circuit controls the bit line to thereby store the encrypted binary datum.

公开(公告)号：US20220191402A1

公开(公告)日：2022-06-16

申请号：US17122667

申请日：2020-12-15

Applicant: STMicroelectronics, Inc. ,  STMicroelectronics SA ,  STMicroelectronics (Research & Development) Limited

Inventor： Darin K. Winterton ,  Donald Baxter ,  Andrew Hodgson ,  Gordon Lunn ,  Olivier Pothier ,  Kalyan-Kumar Vadlamudi-Reddy

IPC: H04N5/232 ,  G06K9/20

Abstract: A method includes dividing a field of view into a plurality of zones and sampling the field of view to generate a photon count for each zone of the plurality of zones, identifying a focal sector of the field of view and analyzing each zone to select a final focal object from a first prospective focal object and a second prospective focal object.

公开(公告)号：US20220180004A1

公开(公告)日：2022-06-09

申请号：US17544038

申请日：2021-12-07

Applicant: STMICROELECTRONICS SA ,  STMicroelectronics (Alps) SAS

Inventor： Julien Goulier ,  Pascal Bernon

IPC: G06F21/75 ,  H03K3/037 ,  H03K3/84

Abstract: The present description concerns an integrated circuit including, between first and second terminals having a first voltage applied therebetween, a load configured to execute instructions, a circuit for delivering a digital signal having at least two bits from a binary signal and a current output digital-to-analog converter controlled by the digital signal and coupled between the first and second terminals in parallel with the load.

公开(公告)号：US11355503B2

公开(公告)日：2022-06-07

申请号：US16708912

申请日：2019-12-10

Applicant: STMicroelectronics SA

Inventor： Stephane Denorme ,  Philippe Candelier

IPC: H01L27/112 ,  H01L23/528 ,  G11C17/18 ,  H01L27/02 ,  H01L29/423

Abstract: A device includes at least three memory cells. For each cell, there is a first doped semiconductor area and a switch coupling the cell to the first area. First doped semiconductor zones connect the first areas together. A memory can include a number of the devices. For example, the cells can be arranged in a matrix, each device defining a row of the matrix.

公开(公告)号：US20220158685A1

公开(公告)日：2022-05-19

申请号：US16951709

申请日：2020-11-18

Applicant: STMicroelectronics SA

Inventor： Vincent Knopik

IPC: H04B1/44

Abstract: A radio frequency module with common access point (1) comprising a common access point (2) adapted to send and receive radio frequency signals, said common access point (2) having a common access point impedance, a first radio frequency communication circuit (6) and a second radio frequency communication circuit (8), a first balun (10) coupled to the first radio frequency communication circuit (6) by first ports (11a, 11b) wherebetween a first impedance (Z1) varying between a high value and a low value is established, and a second balun (20) coupled to the second radio frequency communication circuit (8) by second ports (21a, 21b) wherebetween a second impedance (Z2) varying between a high value and a low value is established, wherein the radio frequency module with common access point (1) comprises an impedance matching circuit (18) connected between the first ports (11a, 11b) in parallel with the first balun (10), and a switch (16) configured to open and close the impedance matching circuit (18).

公开(公告)号：US11336321B1

公开(公告)日：2022-05-17

申请号：US16951669

申请日：2020-11-18

Applicant: STMicroelectronics (Grenoble 2) SAS ,  STMicroelectronics SA

Inventor： Benoit Butaye ,  Thierry Lapergue

IPC: H04B1/44 ,  H03F3/19

Abstract: A transmitter/receiver device include an antenna, a voltage source, a radio frequency receiver connected to the antenna and powered by the voltage source, a radio frequency transmitter connected to the antenna and powered by the voltage source, and a switch coupled to the antenna, the receiver and the transmitter and configured to couple/decouple the antenna from the transmitter or from the receiver. The antenna is shared between the transmitter and the receiver. The receiver includes a radio frequency stage that includes an amplifier device having an input coupled to the antenna. The amplifier device includes an amplifier switch configured to connect or disconnect the amplifier device from the voltage source.

公开(公告)号：US20220139491A1

公开(公告)日：2022-05-05

申请号：US17647793

申请日：2022-01-12

Applicant: STMicroelectronics (Rousset) SAS ,  STMicroelectronics SA

Inventor： Stephane Denorme ,  Philippe Candelier ,  Joel Damiens ,  Fabrice Marinet

IPC: G11C29/52 ,  G11C17/12

Abstract: A device includes a first switch, a first irreversibly programmable memory point, and a second irreversibly programmable memory point coupled in parallel with the first irreversibly programmable memory point. The first switch and the parallel combination of the first and second irreversibly programmable memory points are coupled in series between a first node and a second node.

公开(公告)号：US20220131246A1

公开(公告)日：2022-04-28

申请号：US17646964

申请日：2022-01-04

Applicant: STMicroelectronics (Crolles 2) SAS ,  STMicroelectronics SA

Inventor： Victor Fiorese ,  Frederic Gianesello ,  Florian Voineau

IPC: H01P1/161 ,  H01P1/213 ,  H01P5/19 ,  H01Q25/00

Abstract: An orthomode junction for separating and/or combining orthogonally-polarized radiofrequency wave signals, comprises a body which has a main cavity forming a main waveguide, which has a blind end, and auxiliary cavities forming auxiliary waveguides, which communicate laterally with the main cavity in the vicinity of the blind end thereof, and a deflection insert situated at the blind end of the main cavity and facing the auxiliary cavities, the deflection insert having different shapes on the side of the auxiliary cavities respectively.