公开(公告)号：US09106144B2

公开(公告)日：2015-08-11

申请号：US13794817

申请日：2013-03-12

Applicant: Excelliance MOS Corporation

Inventor： Fu-Chun Huang ,  Hung-Che Chou ,  Pao-Chuan Lin

IPC: G05F1/656 ,  H02M3/335 ,  H02M1/12

CPC classification number: H02M3/33515 ,  H02M1/12

Abstract: A voltage converting apparatus and a sub-harmonic detector are disclosed. The sub-harmonic detector includes a pulse eliminating circuit, a counter, and a comparator. The pulse eliminating circuit receives a pulse width modulation (PWM) signal and a reference PWM signal having a same period. The PWM signal and reference PWM signal has a plurality of pulses and reference pulses respectively. The pulse eliminating circuit eliminates at least one part of the pulses which overlap with the reference pulses for generating a processed signal. The counter counts the processed signal and the PWM signal during a time period to obtain first and second counting values. The comparator compares the first and second counting values for detecting whether a sub-harmonic condition happens or not in the PWM signal.

Abstract translation: 公开了电压转换装置和次谐波检测器。 子谐波检测器包括脉冲消除电路，计数器和比较器。 脉冲消除电路接收具有相同周期的脉宽调制（PWM）信号和参考PWM信号。 PWM信号和参考PWM信号分别具有多个脉冲和参考脉冲。 脉冲消除电路消除了与参考脉冲重叠的脉冲的至少一部分，用于产生经处理的信号。 计数器在一段时间内对经处理的信号和PWM信号进行计数，以获得第一和第二计数值。 比较器比较用于检测PWM信号中是否发生次谐波条件的第一和第二计数值。

公开(公告)号：US20140218162A1

公开(公告)日：2014-08-07

申请号：US13762334

申请日：2013-02-07

Applicant: EXCELLIANCE MOS CORPORATION

Inventor： Chin-Chieh Li ,  Hung-Che Chou ,  Pao-Chuan Lin

IPC: H01C1/14

CPC classification number: H01C1/14 ,  H01C3/14

Abstract: An electric field resistor includes N coils. N coils encircle a common center in sequence, and each of the coils has a first terminal and a second terminal, wherein the first terminal of the first coil receives a first reference voltage, the second terminal of the Nth coil receives a second reference voltage. The second terminal of the ith coil is coupled to the first terminal of the (i+1)th coil, wherein N is a positive integer greater than 1 and 1≦i

Abstract translation: 电场电阻器包括N个线圈。 N个线圈依次包围公共中心，并且每个线圈具有第一端子和第二端子，其中第一线圈的第一端子接收第一参考电压，第N线圈的第二端子接收第二参考电压。 第i线圈的第二端子耦合到第（i + 1）线圈的第一端子，其中N是大于1的正整数，1＆nlE; i

公开(公告)号：US08786397B1

公开(公告)日：2014-07-22

申请号：US13762334

申请日：2013-02-07

Applicant: Excelliance MOS Corporation

Inventor： Chin-Chieh Li ,  Hung-Che Chou ,  Pao-Chuan Lin

IPC: H01C7/22

CPC classification number: H01C1/14 ,  H01C3/14

Abstract: An electric field resistor includes N coils. N coils encircle a common center in sequence, and each of the coils has a first terminal and a second terminal, wherein the first terminal of the first coil receives a first reference voltage, the second terminal of the Nth coil receives a second reference voltage. The second terminal of the ith coil is coupled to the first terminal of the (i+1)th coil, wherein N is a positive integer greater than 1 and 1≦i

Abstract translation: 电场电阻器包括N个线圈。 N个线圈依次包围公共中心，并且每个线圈具有第一端子和第二端子，其中第一线圈的第一端子接收第一参考电压，第N线圈的第二端子接收第二参考电压。 第i线圈的第二端子耦合到第（i + 1）线圈的第一端子，其中N是大于1的正整数，1＆nlE; i

公开(公告)号：US08704451B2

公开(公告)日：2014-04-22

申请号：US13267914

申请日：2011-10-07

Applicant: Yung-Chen Lu

Inventor： Yung-Chen Lu

IPC: H05B37/02

CPC classification number: H05B33/0809 ,  H05B33/0824

Abstract: A driving circuit of a light emitting diode (LED) including an AC power, a rectifier, a power converter, a waveform sampler, and a control circuit is provided. The AC power provides an AC signal. The rectifier is coupled to the AC power and outputs a driving signal. The power converter is coupled to the rectifier. The power converter includes an LED and outputs a first signal positive correlated with a current passing through the LED. The waveform sampler is coupled between the AC power and the rectifier, and outputs a second signal directly proportional to the AC signal. The control circuit is coupled between the waveform sampler and the power converter, and outputs a control signal to the power converter according to a comparison result between the first signal and the second signal.

Abstract translation: 提供了包括交流电源，整流器，功率转换器，波形采样器和控制电路的发光二极管（LED）的驱动电路。 交流电源提供交流信号。 整流器耦合到AC电源并输出驱动信号。 功率转换器耦合到整流器。 功率转换器包括LED并输出与通过LED的电流正相关的第一信号。 波形采样器耦合在交流电源和整流器之间，并输出与AC信号成正比的第二信号。 控制电路耦合在波形采样器和功率转换器之间，并根据第一信号和第二信号之间的比较结果向控制信号输出功率转换器。

公开(公告)号：US20140097822A1

公开(公告)日：2014-04-10

申请号：US13754915

申请日：2013-01-31

Applicant: EXCELLIANCE MOS CORPORATION

Inventor： Hung-Che Chou ,  Fu-Chun Huang ,  Pao-Chuan Lin

IPC: G05F3/04

CPC classification number: G05F3/04 ,  H02M1/32 ,  H02M1/44 ,  H02M7/00 ,  H02M7/06 ,  H02M2001/322

Abstract: A power supply and its startup circuit are provided. The startup circuit includes a first transistor, a bias resistor, a pull-down switch, a voltage detector, and a discharging path generator. A first end of the first transistor receives alternating current (AC) input power. The bias resistor is serially coupled between a second end and a control end of the first transistor. The pull-down switch is turned on or turned off according to a detection result. The voltage detector generates the detection result by detecting a voltage on the second end of the first transistor. The discharging path generator provides a discharging path between the second end of the first transistor and a reference ground voltage according to the detection result.

Abstract translation: 提供电源及其启动电路。 启动电路包括第一晶体管，偏置电阻器，下拉开关，电压检测器和放电路径发生器。 第一晶体管的第一端接收交流（AC）输入功率。 偏置电阻器串联耦合在第一晶体管的第二端和控制端之间。 根据检测结果，下拉开关打开或关闭。 电压检测器通过检测第一晶体管的第二端上的电压来产生检测结果。 放电路径发生器根据检测结果提供在第一晶体管的第二端和参考接地电压之间的放电路径。

公开(公告)号：US08598810B2

公开(公告)日：2013-12-03

申请号：US13101154

申请日：2011-05-05

Applicant: Yung-Chen Lu

Inventor： Yung-Chen Lu

IPC: H05B37/02

CPC classification number: H05B33/0815 ,  H05B33/0851

Abstract: A constant current driving circuit of a light emitting diode (LED) including a control unit, a buck converter, and a compensation unit is provided. The control unit has an input terminal and an output terminal, and outputs a control signal through the output terminal. The buck converter is coupled to an input power, and is coupled between the output terminal of the control unit and an LED string. The compensation unit is coupled between the LED string and the input terminal of the control unit. The control unit receives a compensation signal of the compensation unit through the input terminal. Besides, a lighting apparatus is also provided.

Abstract translation: 提供了包括控制单元，降压转换器和补偿单元的发光二极管（LED）的恒流驱动电路。 控制单元具有输入端子和输出端子，并通过输出端子输出控制信号。 降压转换器耦合到输入功率，并且耦合在控制单元的输出端子和LED串之间。 补偿单元耦合在LED串和控制单元的输入端之间。 控制单元通过输入端接收补偿单元的补偿信号。 此外，还提供了一种照明装置。

公开(公告)号：US20130248986A1

公开(公告)日：2013-09-26

申请号：US13596081

申请日：2012-08-28

Applicant: Chu-Kuang Liu

Inventor： Chu-Kuang Liu

IPC: H01L29/78

CPC classification number: H01L29/7813 ,  H01L29/0619 ,  H01L29/1095 ,  H01L29/402 ,  H01L29/404 ,  H01L29/407 ,  H01L29/41766 ,  H01L29/7811

Abstract: A power MOSFET includes an epitaxy substrate, conductive trenches, well regions and a dielectric layer. The power MOSFET further has at least one termination structure including at lest one of the conductive trenches, some of the well regions within a termination area and mutually insulated by the conductive trench, a field plate, a contact plug and a heavily-doped region. The field plate including a plate metal and the dielectric layer is on the well regions and the conductive trench within the termination area. The contact plug penetrates through the dielectric layer and connects the plate metal and one of the well regions, so the plate metal has equal potential with the connected well region through the contact plug. The well regions and the conductive trench are electrically coupled to the plate metal by the dielectric layer. The heavily-doped region is between the contact plug and the connected well region.

Abstract translation: 功率MOSFET包括外延衬底，导电沟槽，阱区和电介质层。 功率MOSFET还具有至少一个终端结构，其包括至少一个导电沟槽，端接区域内的一些阱区域，并且由导电沟槽，场板，接触插塞和重掺杂区域相互绝缘。 包括板金属和电介质层的场板位于阱区域和端接区域内的导电沟槽之间。 接触插塞穿过电介质层并连接板金属和其中一个阱区，因此板金属通过接触插塞与连接的阱区具有相等的电位。 阱区和导电沟槽通过电介质层电耦合到板金属。 重掺杂区域在接触插​​塞和连接的阱区之间。

公开(公告)号：US08349691B2

公开(公告)日：2013-01-08

申请号：US12687845

申请日：2010-01-14

Applicant: Yi-Chi Chang ,  Chia-Lien Wu

Inventor： Yi-Chi Chang ,  Chia-Lien Wu

IPC: H01L21/336 ,  H01L29/66

CPC classification number: H01L29/7813 ,  H01L29/42368 ,  H01L29/511 ,  H01L29/518 ,  H01L29/66734

Abstract: A method of forming a power MOSFET is described. An epitaxial layer of first conductivity type is formed on a substrate of first conductivity type. A body layer of second conductivity type is formed in the epitaxial layer. A plurality of mask patterns are formed on the substrate. A plurality of trenches are formed in the body layer and the epitaxial layer between the mask patterns. An oxide layer is formed on surfaces of the trenches. A conductive layer is formed in the trenches. A trimming process is performed to the mask patterns to reduce the line width of each mask pattern. Two source regions of first conductivity type are formed in the body layer beside each trench by using the trimmed mask patterns as a mask. A plurality of dielectric patterns are formed on the conductive layer and between the trimmed mask patterns. The trimmed mask patterns are removed.

Abstract translation: 描述形成功率MOSFET的方法。 在第一导电类型的衬底上形成第一导电类型的外延层。 在外延层中形成第二导电类型的主体层。 在基板上形成多个掩模图案。 在体层中形成多个沟槽，在掩模图案之间形成外延层。 在沟槽的表面上形成氧化物层。 在沟槽中形成导电层。 对掩模图案进行修整处理以减少每个掩模图案的线宽度。 通过使用修剪的掩模图案作为掩模，在每个沟槽旁边的体层中形成第一导电类型的两个源极区域。 多个介电图案形成在导电层上和修剪后的掩模图案之间。 修剪的蒙版图案被去除。

公开(公告)号：US20120231595A1

公开(公告)日：2012-09-13

申请号：US13480495

申请日：2012-05-25

Applicant: Chu-Kuang Liu

Inventor： Chu-Kuang Liu

IPC: H01L21/336

CPC classification number: H01L29/7813 ,  H01L29/0653 ,  H01L29/1095 ,  H01L29/407 ,  H01L29/41766 ,  H01L29/456 ,  H01L29/47 ,  H01L29/66143 ,  H01L29/66727 ,  H01L29/66734 ,  H01L29/782 ,  H01L29/872

Abstract: A method of forming a semiconductor structure is provided. A second area is between first and third areas. An epitaxial layer is formed on a substrate. A first gate is formed in the epitaxial layer and partially in first and second areas. A second gate is formed in the epitaxial layer and partially in second and third areas. A body layer is formed in the epitaxial layer in first and second areas. A doped region is formed in the body layer in the first area. All of the doped region, the epitaxial layer and the second gate are partially removed to form a first opening in the doped region and in the body layer in the first area, and form a second opening in the epitaxial layer in the third area and in a portion of the second gate. A first metal layer is filled in first and second openings.

Abstract translation: 提供一种形成半导体结构的方法。 第二个区域是第一和第三个区域之间。 在衬底上形成外延层。 第一栅极形成在外延层中，部分地形成在第一和第二区域中。 第二栅极形成在外延层中，部分地形成在第二和第三区域中。 在第一和第二区域的外延层中形成体层。 在第一区域的主体层中形成掺杂区域。 所有掺杂区域，外延层和第二栅极被部分去除以在第一区域中的掺杂区域和体层中形成第一开口，并且在第三区域中的外延层中形成第二开口 第二门的一部分。 第一金属层填充在第一和第二开口中。

公开(公告)号：US08227858B2

公开(公告)日：2012-07-24

申请号：US12685644

申请日：2010-01-11

Applicant: Yi-Chi Chang ,  Chia-Lien Wu

Inventor： Yi-Chi Chang ,  Chia-Lien Wu

IPC: H01L29/78

CPC classification number: H01L29/7813 ,  H01L29/402 ,  H01L29/42368 ,  H01L29/42376 ,  H01L29/511 ,  H01L29/66734 ,  H01L29/7811

Abstract: A power MOSFET is described. A trench is in a body layer and an epitaxial layer. An isolation structure is on the substrate at one side of the trench. An oxide layer is on the surface of the trench. A first conductive layer fills the trench and extends to the isolation structure. A dielectric layer is on the first conductive layer and isolation structure and has an opening exposing the first conductive layer. At least one source region is in the body layer at the other side of the trench. A second conductive layer is on the dielectric layer and electrically connected to the source region while electrically isolated from the first conductive layer by the dielectric layer. A third conductive layer is on the dielectric layer and electrically connected to the first conductive layer through the opening of the dielectric layer. The second and third conductive layers are separated.

Abstract translation: 描述功率MOSFET。 沟槽在体层和外延层中。 隔离结构位于沟槽一侧的衬底上。 氧化层位于沟槽表面。 第一导电层填充沟槽并延伸到隔离结构。 电介质层位于第一导电层和隔离结构上，并具有暴露第一导电层的开口。 至少一个源区位于沟槽另一侧的体层中。 第二导电层在电介质层上并且电连接到源极区，同时通过电介质层与第一导电层电隔离。 第三导电层位于电介质层上，并通过电介质层的开口与第一导电层电连接。 第二和第三导电层被分开。