Apparatus and method for determining heartbeat interval of activesync service in wireless communication system
    32.
    发明授权
    Apparatus and method for determining heartbeat interval of activesync service in wireless communication system 有权
    用于确定无线通信系统中活动同步业务的心跳间隔的装置和方法

    公开(公告)号:US08566430B2

    公开(公告)日:2013-10-22

    申请号:US12758976

    申请日:2010-04-13

    CPC classification number: H04L67/1095 H04L43/10 H04L69/16

    Abstract: A method and an apparatus for determining a HeartBeat Interval (HBI) of an activesync service in a wireless communication system are provided. In the method, a predetermined minimum value is set as the HBI, and transmission/reception of a ping message is performed. Whether transmission/reception of a ping message corresponding to the set HBI is performed successfully is determined. When the transmission/reception of the ping message succeeds successively within a predetermined frequency, the HBI is set to a predetermined maximum value.

    Abstract translation: 提供了一种用于确定无线通信系统中的活动同步服务的心跳间隔(HBI)的方法和装置。 在该方法中,将预定的最小值设置为HBI,并且执行ping消息的发送/接收。 确定是否成功执行与设定的HBI相对应的ping消息的发送/接收。 当ping消息的发送/接收在预定频率内连续成功时,HBI被设置为预定的最大值。

    CATALYST FOR GENERATING HYDROGEN AND METHOD FOR GENERATING HYDROGEN
    33.
    发明申请
    CATALYST FOR GENERATING HYDROGEN AND METHOD FOR GENERATING HYDROGEN 有权
    用于产生氢的催化剂和用于产生氢的方法

    公开(公告)号:US20130059217A1

    公开(公告)日:2013-03-07

    申请号:US13607093

    申请日:2012-09-07

    Abstract: The present invention provides a catalyst for generating hydrogen, containing a composite metal of iron and nickel, the catalyst used in a decomposition reaction of at least one compound selected from the group consisting of hydrazine and hydrates thereof; and a method for generating hydrogen, including contacting the catalyst for generating hydrogen with at least one compound selected from the group consisting of hydrazine and hydrates thereof.According to the invention, hydrogen can be efficiently generated with improved selectivity in the method for generating hydrogen that utilizes the decomposition reaction of hydrogen.

    Abstract translation: 本发明提供了含有铁和镍的复合金属的氢的催化剂,所述催化剂用于至少一种选自肼及其水合物的化合物的分解反应; 以及产生氢的方法,包括使用于生成氢的催化剂与选自肼及其水合物的至少一种化合物接触。 根据本发明,在利用氢的分解反应的产生氢气的方法中,可以以提高的选择性有效地产生氢。

    METHOD AND APPARATUS FOR CLEANING DATA SETS FOR A SEARCH PROCESS
    34.
    发明申请
    METHOD AND APPARATUS FOR CLEANING DATA SETS FOR A SEARCH PROCESS 有权
    用于清理搜索过程数据集的方法和装置

    公开(公告)号:US20120254202A1

    公开(公告)日:2012-10-04

    申请号:US13099685

    申请日:2011-05-03

    CPC classification number: G06F17/30241 G06F17/30303

    Abstract: An approach is provided for cleaning data sets for a search process. The cleanup platform determines one or more reference documents associated with at least one region. Next, the cleanup platform processes and/or facilitates a processing of the one or more reference documents to determine a frequency distribution of one or more candidate stop words with respect to the at least one region. Then, the cleanup platform causes, at least in part, selection of one or more stop words applicable to the at least one region from the one or more candidate stop words based, at least in part, on one or more frequency distribution criteria. Additionally, the cleanup platform processes and/or facilitates a processing of at least one data set associated with a search process to generate at least one enhanced data set by filtering the one or more stop words from the at least one data set.

    Abstract translation: 提供了一种清理搜索过程数据集的方法。 清理平台确定与至少一个区域相关联的一个或多个参考文档。 接下来,清理平台处理和/或促进对一个或多个参考文档的处理,以确定关于至少一个区域的一个或多个候选停止词的频率分布。 然后,清理平台至少部分地至少部分地基于一个或多个频率分布标准,从一个或多个候选停止词中选择适用于至少一个区域的一个或多个停止词。 另外,清理平台处理和/或促进与搜索过程相关联的至少一个数据集的处理,以通过从至少一个数据集过滤一个或多个停止词来生成至少一个增强数据集。

    Power Saving Features in a Communication Device
    35.
    发明申请
    Power Saving Features in a Communication Device 有权
    通信设备中的省电功能

    公开(公告)号:US20110188424A1

    公开(公告)日:2011-08-04

    申请号:US13016603

    申请日:2011-01-28

    Abstract: A method in a communication network includes receiving a data unit that includes a request to transmit an aggregate data unit to a communication device, and, in response to receiving the data unit, generating an aggregate data unit for transmission to the communication device, where the aggregate data unit includes a plurality of component data units, each having a respective media access channel (MAC) header, and a duration of the aggregate data unit is determined using a parameter negotiated with the communication device.

    Abstract translation: 通信网络中的一种方法包括:接收包括向通信设备发送聚合数据单元的请求的数据单元,并且响应于接收到所述数据单元,生成用于传输到通信设备的聚合数据单元,其中 聚合数据单元包括多个分量数据单元,每个分量数据单元具有相应的媒体访问信道(MAC)报头,并且使用与通信设备协商的参数来确定聚合数据单元的持续时间。

    STAND ALONE LAMP FILAMENT PREHEAT CIRCUIT FOR BALLAST
    36.
    发明申请
    STAND ALONE LAMP FILAMENT PREHEAT CIRCUIT FOR BALLAST 审中-公开
    单独的灯泡灯泡预热电路

    公开(公告)号:US20090256481A1

    公开(公告)日:2009-10-15

    申请号:US12177590

    申请日:2008-07-22

    CPC classification number: H05B41/295

    Abstract: A lamp filament preheating circuit using modified flyback topology which gives pulsating AC in the secondary of the flyback transformer. The circuit may be controller based or implemented by a monoshot and astable multivibrator. A self-oscillation, parallel resonant current fed half bridge inverter circuit may include an arc sensing circuit.

    Abstract translation: 使用改进的反激拓扑的灯丝预热电路,其在回扫变压器的次级中产生脉动AC。 电路可以是基于控制器的或由单调和不稳定的多谐振荡器实现的。 自谐振并联谐振电流半桥逆变电路可以包括电弧感测电路。

    Rapid interconnect and logic testing of FPGA device
    37.
    发明授权
    Rapid interconnect and logic testing of FPGA device 有权
    FPGA器件的快速互连和逻辑测试

    公开(公告)号:US07477070B2

    公开(公告)日:2009-01-13

    申请号:US11294645

    申请日:2005-12-05

    Abstract: A FPGA device that includes a plurality of programmable logic blocks connected to each other through interconnect resources, one or more sets of registers connected to the interconnect resources for configuring the programmable logic blocks. Additional logic is provided with the registers for selecting an interconnect/logic block testing mode thereby enabling a rapid interconnect/logic testing.

    Abstract translation: 一种FPGA器件,其包括通过互连资源彼此连接的多个可编程逻辑块,连接到互连资源的一组或多组寄存器,用于配置可编程逻辑块。 提供附加逻辑用于选择互连/逻辑块测试模式的寄存器,从而实现快速互连/逻辑测试。

    Method and apparatus of reloading erroneous configuration data frames during configuration of programmable logic devices
    39.
    发明授权
    Method and apparatus of reloading erroneous configuration data frames during configuration of programmable logic devices 失效
    在配置可编程逻辑器件期间重新加载错误配置数据帧的方法和装置

    公开(公告)号:US07350134B2

    公开(公告)日:2008-03-25

    申请号:US10667199

    申请日:2003-09-18

    CPC classification number: G06F11/1402 G01R31/318519 G06F11/1008

    Abstract: An improved method and apparatus for reloading frames in which errors are detected during the Programmable Logic Device configuration. A configuration data frame for a FPGA is loaded to the Frame register of the FPGA and also to an error detection circuit which detects errors with the loaded frame. An error counter value is maintained by the apparatus and is incremented each time an error with a frame is detected. The incremented value is compared by a Comparator circuit with a pre-determined threshold value ‘n’. If a match is found then the configuration process is aborted, else the data frame is reloaded in the configuration memory, transferred again to the frame register and rechecked for errors. If no error is detected with the reloaded frame, the error counter value is reset and the next frame is loaded until the FPGA configuration process is over.

    Abstract translation: 一种用于重新加载在可编程逻辑器件配置期间检测到错误的帧的改进的方法和装置。 FPGA的配置数据帧被加载到FPGA的帧寄存器,并且还加载到检测错误的错误检测电路。 错误计数器值由设备维护,并且每当检测到帧的错误时递增。 递增值由具有预定阈值“n”的比较器电路进行比较。 如果发现匹配,则配置过程将中止,否则数据帧将重新加载到配置存储器中,再次传输到帧寄存器并重新检查错误。 如果在重新加载的帧中没有检测到错误,错误计数器值将被复位,下一个帧被加载,直到FPGA配置过程结束。

    Decoder scheme for making large size decoder

    公开(公告)号:US06794906B2

    公开(公告)日:2004-09-21

    申请号:US10269166

    申请日:2002-10-10

    CPC classification number: H03K17/693

    Abstract: An improved multi-stage binary hierarchy decoder characterized in that at least one of the decoding stages subsequent to the first stage is implemented as a Transmission Gate Matrix (TGM) in which a single transmission gate enables an active input from the previous stage to its output, thereby resulting in reduced area requirements when implemented as an integrated circuit.

Patent Agency Ranking