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公开(公告)号:US10712385B2
公开(公告)日:2020-07-14
申请号:US15780009
申请日:2016-12-01
Applicant: CRYPTOGRAPHY RESEARCH, INC.
Inventor: Michael Hutter , Matthew Pond Baker
IPC: G01R31/317 , G06F21/75 , H04L9/00 , G09C1/00 , G06F21/72 , G01R31/3177 , G06F21/55
Abstract: A first plurality of logic gates and a second plurality of logic gates may be associated with a symmetric configuration. A first output at a first value may be generated by the first plurality of logic gates based on a first portion of input signals. A second output may be generated by the second plurality of logic gates at the first value based on a second portion of the input signals. A subsequent first output at a particular value may be generated by the first plurality of logic gates based on a first portion of a second plurality of input signals and a subsequent second output maybe generated by the second plurality of logic gates based on a second portion of the second plurality of input signals. A value of the subsequent second output may be complementary to the particular value of the subsequent first output.
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公开(公告)号:US20200220709A1
公开(公告)日:2020-07-09
申请号:US16722407
申请日:2019-12-20
Applicant: Cryptography Research, Inc.
Inventor: Michael A. Hamburg , Megan Anneke Wachs
Abstract: A container corresponding to executable code may be received. In response receiving the container, an assertion value may be stored in an assertion register. A final canary value may be generated based on a cycles combining a prior canary value and a mix value. A determination may be made as to whether the final canary value matches with the assertion value stored in the assertion register. In response to determining that the final canary value matches with the assertion value, one or more privilege registers may be programmed to provide access to hardware resources for the container corresponding to the executable user code.
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33.
公开(公告)号:US10699030B2
公开(公告)日:2020-06-30
申请号:US15533845
申请日:2015-11-23
Applicant: CRYPTOGRAPHY RESEARCH, INC.
Inventor: Jeremy Samuel Cooper
Abstract: Systems and methods for determining cryptographic operation masks for improving resistance to external monitoring attacks. An example method may comprise: selecting a first input mask value, a first output mask value, and one or more intermediate mask values; based on the first output mask value and the intermediate mask values, calculating a first transformation output mask value comprising two or more portions, wherein concatenation of all portions of the first transformation output mask value produces the first transformation output mask value, and wherein exclusive disjunction of all portions of the first transformation output mask value is equal to the first output mask value; and performing a first masked transformation based on the first transformation output mask value and the first input mask value.
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公开(公告)号:US10666641B2
公开(公告)日:2020-05-26
申请号:US16138105
申请日:2018-09-21
Applicant: Cryptography Research Inc.
Inventor: Paul Carl Kocher , Benjamin Che-Ming Jun , Andrew John Leiserson
Abstract: A mechanism for providing secure feature and key management in integrated circuits is described. An example method includes receiving, by a root authority system, data identifying a command that affects operation of an integrated circuit, singing, by the root authority system, the command using a root authority key to create a root signed block (RSB), and providing the RSB to a security manager of the integrated circuit.
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35.
公开(公告)号:US20200021426A1
公开(公告)日:2020-01-16
申请号:US16519330
申请日:2019-07-23
Applicant: Cryptography Research, Inc.
Inventor: Sami James Saab , Pankaj Rohatgi , Craig E. Hampel
Abstract: Systems and methods for performing cryptographic data processing operations in a manner resistant to external monitoring attacks. An example method may comprise: executing, by a processing device, a first data manipulation instruction, the first data manipulation instruction affecting a state of the processing device; executing a second data manipulation instruction, the second data manipulation instruction interacting with said internal state; and breaking a detectable interaction of the first data manipulation instruction and the second data manipulation instruction by executing a third data manipulation instruction utilizing an unpredictable data item.
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公开(公告)号:US10461925B2
公开(公告)日:2019-10-29
申请号:US15673284
申请日:2017-08-09
Applicant: Cryptography Research, Inc.
Inventor: Matthew Pond Baker , Elena Trichina , Jean-Michel Cioranesco , Michael Hutter
Abstract: An integrated circuit may implement a masked substitution box that includes a counter that generates counter values. An input mask component may generate unmasked input values based on a combination of respective counter values and an input mask value. Furthermore, a substitution function component may receive the unmasked input values and may generate output values based on respective unmasked input values and a substitution function. An output mask component may generate masked output values based on a combination of respective output values and an output mask value. The masked output values may be stored at memory elements.
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公开(公告)号:US10460084B2
公开(公告)日:2019-10-29
申请号:US16122362
申请日:2018-09-05
Applicant: Cryptography Research, Inc.
Inventor: Paul C. Kocher , Helena Handschuh
Abstract: A media storage device includes a media security controller circuit and a memory to store data that relates to a media item to be rendered by a rendering device. The media security controller circuit sends a message to the rendering device that causes the rendering device to obtain a portion of data from memory of the media storage device and provide it to the media security controller circuit. The portion is received and transformed by the media security controller circuit. The media security controller circuit sends the transformed portion to the rendering device.
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公开(公告)号:US10440000B2
公开(公告)日:2019-10-08
申请号:US15322707
申请日:2015-07-09
Applicant: CRYPTOGRAPHY RESEARCH, INC.
Inventor: Ambuj Kumar , Daniel Beitel , Benjamin Che-Ming Jun
Abstract: A first instruction to store an entity identification (ID) in a memory of a device may be received. The entity ID may be stored in the memory in response to receiving the first instruction. Furthermore, a second instruction to store a value based on a key in the memory of the device may be received. A determination may be made as to whether the value based on the key that is to be stored in the memory corresponds to the entity ID that is stored in the memory. The value based on the key may be stored in the memory of the device when the value based on the key corresponds to the entity ID.
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39.
公开(公告)号:US20190296898A1
公开(公告)日:2019-09-26
申请号:US16311148
申请日:2017-06-23
Applicant: CRYPTOGRAPHY RESEARCH, INC.
Inventor: Elke De Mulder
Abstract: Systems and methods for performing cryptographic data processing operations employing non-linear share encoding for protecting from external monitoring attacks. An example method may comprise: receiving a plurality of shares representing a secret value employed in a cryptographic operation, wherein plurality of shares comprises a first share represented by an un-encoded form and a second share represented by an encoded form; producing a transformed form of the second share; and performing the cryptographic operation using the transformed form of the second share.
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公开(公告)号:US10303623B2
公开(公告)日:2019-05-28
申请号:US15469999
申请日:2017-03-27
Applicant: Cryptography Research, Inc.
Inventor: Scott C. Best , Brent S. Haukness , Carl W. Werner
IPC: G06F12/02 , G06F12/14 , G06F21/44 , G06F21/55 , G06F21/75 , G06F21/79 , G06F3/06 , G11C13/00 , G11C7/24 , H04L9/00 , H04L9/08 , H04L9/32
Abstract: A first non-volatile memory may store first data and a second non-volatile memory may store second data. An authentication component may be coupled with the first non-volatile memory and the second non-volatile memory and may receive a request to perform an authentication operation. In response to the request to perform the authentication operation, the authentication component may access the first data stored at the first non-volatile memory and the second data stored at the second non-volatile memory and determine whether the second data stored at the second non-volatile memory has become unreliable based on a memory disturbance condition. In response to determining that the second data stored at the second non-volatile memory has become unreliable, a corrective action associated with the first data stored at the first non-volatile memory may be performed.
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