摘要:
The present invention provides a semiconductor device having a silicide thin film and method of forming the same. A semiconductor device comprises a gate insulation layer formed on an active region of a semiconductor substrate. A gate electrode is formed on the gate insulation layer. An impurity region is formed in the active region adjacent the gate electrode. A silicide thin film such as a cobalt silicide thin film is formed to a thickness of less than approximately 200 Å in the impurity region.
摘要:
A liquid crystal display device is divided into a display region and a non-display region. A first thin film transistor is formed in each pixel region of the display region, and a second thin film transistor is formed in the non-display region. The first thin film transistor is a switch for controlling the supply of a data voltage to the pixel region, and the second thin film transistor is a switch for controlling the supply of a common voltage to the pixel region. The first thin film transistor has the same parasitic capacitance as that of the second thin film transistor. Accordingly, the flicker or image-sticking can be prevented. Also, the aperture ratio of each pixel region can be improved.
摘要:
A method for fabricating a MOS transistor using a self-aligned silicide technique is provided. The method includes forming a gate electrode and a silicidation resistant layer pattern that are sequentially stacked on a predetermined region of a semiconductor substrate. Impurities are implanted into the semiconductor substrate to form a source/drain region. A first metal silicide layer is selectively formed on the surface of the source/drain region. The silicidation resistant layer pattern is then removed to expose the gate electrode. A second metal silicide layer is selectively formed on the exposed gate electrode. Consequently, the first metal silicide layer can be formed of a metal silicide layer having superior tolerance with respect to junction spiking. Also, the second metal silicide layer can be formed of another metal silicide layer having a low variation of resistivity due to the variation of the line width of the gate electrode. Therefore, it is possible to fabricate a high-performance MOS transistor suitable for a highly integrated semiconductor device.