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    System and method for dynamically managing tasks for data parallel processing on multi-core system
    32.
    发明申请
    System and method for dynamically managing tasks for data parallel processing on multi-core system 有权
    用于动态管理多核系统数据并行处理任务的系统和方法

    公开(公告)号：US20110231856A1

    公开(公告)日：2011-09-22

    申请号：US12923793

    申请日：2010-10-07

    Applicant: Min Young Son ,  Shi Hwa Lee ,  Seung Won Lee ,  Jeong Joon Yoo ,  Jae Don Lee ,  Young Sam Shin

    Inventor： Min Young Son ,  Shi Hwa Lee ,  Seung Won Lee ,  Jeong Joon Yoo ,  Jae Don Lee ,  Young Sam Shin

    IPC: G06F9/46

    CPC classification number: G06F9/5088

    Abstract: A dynamic task management system and method for data parallel processing on a multi-core system are provided. The dynamic task management system may generate a registration signal for a task to be parallel processed, may generate a dynamic management signal used to dynamically manage at least one task, in response to the generated registration signal, and may control the at least one task to be created or cancelled in at least one core in response to the generated dynamic management signal.

    Abstract translation: 提供了一种用于多核系统上数据并行处理的动态任务管理系统和方法。 动态任务管理系统可以生成用于待并行处理的任务的注册信号，可以响应于所生成的注册信号而生成用于动态管理至少一个任务的动态管理信号，并且可以将至少一个任务控制为 响应于所生成的动态管理信号在至少一个核心中创建或取消。

    COMPUTING SYSTEM AND METHOD CONTROLLING MEMORY OF COMPUTING SYSTEM
    33.
    发明申请
    COMPUTING SYSTEM AND METHOD CONTROLLING MEMORY OF COMPUTING SYSTEM 有权
    计算机系统和控制计算机存储器的方法

    公开(公告)号：US20110119463A1

    公开(公告)日：2011-05-19

    申请号：US12881752

    申请日：2010-09-14

    Applicant: Jae Don Lee ,  Shi Hwa Lee ,  Seung Won Lee ,  Chae Seok Lim ,  Min Kyu Jeong

    Inventor： Jae Don Lee ,  Shi Hwa Lee ,  Seung Won Lee ,  Chae Seok Lim ,  Min Kyu Jeong

    IPC: G06F12/02

    CPC classification number: G06F9/5016

    Abstract: Provided is a computing system having a hierarchical memory structure. When a data structure is allocated with respect to a task processed in the computing system, the data structure is divided and a portion of the data structure is allocated to a high speed memory of the hierarchical memory structure and a remaining data structure is allocated to a low speed memory of the hierarchical memory.

    Abstract translation: 提供了具有分层存储器结构的计算系统。 当相对于在计算系统中处理的任务分配数据结构时，数据结构被划分，并且数据结构的一部分被分配给分层存储器结构的高速存储器，并且剩余的数据结构被分配给 分层存储器的低速存储器。

    APPARATUS AND METHOD FOR MANAGING MEMORY
    34.
    发明申请
    APPARATUS AND METHOD FOR MANAGING MEMORY 有权
    用于管理存储器的装置和方法

    公开(公告)号：US20100199023A1

    公开(公告)日：2010-08-05

    申请号：US12483027

    申请日：2009-06-11

    Applicant: Jae Don LEE

    Inventor： Jae Don LEE

    IPC: G06F12/00 ,  G06F12/02

    CPC classification number: G06F12/0246 ,  G06F2212/7204

    Abstract: A memory management method and apparatus are disclosed. The memory management apparatus may compute a remaining storage capacity of a flash memory based on a number of bad blocks in a flash memory or a number of block-erases of each of a plurality of blocks, and may display the computed remaining storage capacity of the flash memory.

    Abstract translation: 公开了一种存储器管理方法和装置。 存储器管理装置可以基于快闪存储器中的坏块的数量或多个块中的每一个的块擦除次数来计算闪存的剩余存储容量，并且可以显示所计算的剩余存储容量 闪存

    Kernel-aware debugging system, medium, and method
    35.
    发明申请
    Kernel-aware debugging system, medium, and method 失效
    内核感知调试系统，介质和方法

    公开(公告)号：US20070266376A1

    公开(公告)日：2007-11-15

    申请号：US11797759

    申请日：2007-05-07

    Applicant: Keun-soo Yim ,  Jung-keun Park ,  Jeong-joon Yoo ,  Jae-don Lee ,  Chae-seok Im ,  Young-sam Shin

    Inventor： Keun-soo Yim ,  Jung-keun Park ,  Jeong-joon Yoo ,  Jae-don Lee ,  Chae-seok Im ,  Young-sam Shin

    IPC: G06F9/44

    CPC classification number: G06F11/3644 ,  G06F11/3656

    Abstract: A kernel-aware debugging system, medium, and method. The kernel-aware debugging system may include a kernel-aware debugging interface including a conditional breakpoint setting unit which sets a kernel-aware conditional breakpoint by checking a currently operating object inside a kernel of a target system when a central processing unit (CPU) of the target system stops operating at a particular position where the breakpoint is set and making the CPU proceed to operate when it is determined that it is not intended that the currently operating object be debugged. Moreover, the kernel-aware debugging interface may include a unit which stores control flow information for detecting faults due to asynchronous events, a profiling unit which collects profile information and allows back-tracing when faults occur, and a unit which debugs a synchronization problem between multitasks.

    Abstract translation: 内核感知调试系统，介质和方法。 内核感知调试系统可以包括内核感知调试接口，其包括条件断点设置单元，其通过在目标系统的内核中检查当前操作的对象来设置内核感知条件断点，当中央处理单元（CPU） 目标系统停止在设置断点的特定位置进行操作，并且当确定不希望当前操作对象被调试时使得CPU继续操作。 此外，内核感知调试接口可以包括存储用于检测由于异步事件引起的故障的控制流信息的单元，收集简档信息并在发生故障时允许回溯的简档单元，以及调试在故障发生之间的同步问题的单元 多任务

    Method and system for providing context switch using multiple register file
    36.
    发明申请
    Method and system for providing context switch using multiple register file 有权
    使用多个寄存器文件提供上下文切换的方法和系统

    公开(公告)号：US20070226474A1

    公开(公告)日：2007-09-27

    申请号：US11712998

    申请日：2007-03-02

    Applicant: Jae Don Lee ,  Keun Soo Yim ,  Woon Gee Kim ,  Jeong Joon Yoo ,  Jung Keun Park ,  Chang-Woo Baek ,  Chae Seok Im

    Inventor： Jae Don Lee ,  Keun Soo Yim ,  Woon Gee Kim ,  Jeong Joon Yoo ,  Jung Keun Park ,  Chang-Woo Baek ,  Chae Seok Im

    IPC: G06F9/44

    CPC classification number: G06F9/462

    Abstract: A context switch method capable of promptly switching a context for a dynamically generated task and a dynamic link by converting a state of multiple register files, switching the context, and separately restoring and storing the context. That is, the context switch method includes: maintaining a multiple register files; establishing the multiple register to be in any one of a prefetch state, a current state, and a store state; converting a state of the multiple register files to be in any one of the prefetch state, the current state, and the store state when a context switch occurs; wherein, in the prefetch state, determining a memory address to read a next task context to be subsequently performed by the register file, in the current state, performing a task with the task context of the register file and in the store state, storing the register file in a memory.

    Abstract translation: 一种上下文切换方法，其能够通过转换多个寄存器文件的状态，切换上下文以及单独地恢复和存储上下文来迅速切换动态生成的任务的上下文和动态链接。 也就是说，上下文切换方法包括：保持多个寄存器文件; 将多个寄存器建立为预取状态，当前状态和存储状态中的任何一个; 当上下文切换发生时，将多个寄存器文件的状态转换为预取状态，当前状态和存储状态中的任一个; 其特征在于，在所述预取状态下，确定存储器地址以读取随后由所述寄存器文件执行的下一个任务上下文，在当前状态下，执行具有所述寄存器堆的任务上下文和存储状态的任务， 将文件注册到内存中。

    Method, medium and apparatus storing and restoring register context for fast context switching between tasks
    37.
    发明申请
    Method, medium and apparatus storing and restoring register context for fast context switching between tasks 有权
    方法，介质和装置存储和恢复注册上下文，用于任务之间的快速上下文切换

    公开(公告)号：US20070136733A1

    公开(公告)日：2007-06-14

    申请号：US11637133

    申请日：2006-12-12

    Applicant: Jung-keun Park ,  Keun-soo Yim ,  Woon-gee Kim ,  Jeong-joon Yoo ,  Kyoung-ho Kang ,  Chae-seok Im ,  Jae-don Lee

    Inventor： Jung-keun Park ,  Keun-soo Yim ,  Woon-gee Kim ,  Jeong-joon Yoo ,  Kyoung-ho Kang ,  Chae-seok Im ,  Jae-don Lee

    IPC: G06F9/46

    CPC classification number: G06F9/461 ,  G06F8/443

    Abstract: A method, medium and apparatus for storing and restoring a register context for a fast context switching between tasks is disclosed. The method, medium and apparatus may improve overall operating speed of a system by increasing the speed of context switching. The method may include adding an update code for updating information of live registers to a task file that includes a code of a task to perform a specified function, converting the task file having the update code added thereto into a run file, updating the information of the live registers with the update code during running of the task using the run file, and storing a live register context according to the updated information of the registers.

    Abstract translation: 公开了用于存储和恢复用于任务之间的快速上下文切换的注册上下文的方法，介质和装置。 方法，介质和装置可以通过增加上下文切换的速度来提高系统的总体操作速度。 该方法可以包括将用于更新实时寄存器的信息的更新代码添加到包括执行指定功能的任务代码的任务文件，将具有添加到其中的更新代码的任务文件转换为运行文件，更新信息 使用运行文件在任务运行期间使用更新代码进行实时注册，并根据寄存器的更新信息存储实时注册上下文。

    System and method for dynamically managing tasks for data parallel processing on multi-core system
    40.
    发明授权
    System and method for dynamically managing tasks for data parallel processing on multi-core system 有权
    用于动态管理多核系统数据并行处理任务的系统和方法

    公开(公告)号：US08555289B2

    公开(公告)日：2013-10-08

    申请号：US12923793

    申请日：2010-10-07

    Applicant: Min Young Son ,  Shi Hwa Lee ,  Seung Won Lee ,  Jeong Joon Yoo ,  Jae Don Lee ,  Young Sam Shin

    Inventor： Min Young Son ,  Shi Hwa Lee ,  Seung Won Lee ,  Jeong Joon Yoo ,  Jae Don Lee ,  Young Sam Shin

    IPC: G06F9/46

    CPC classification number: G06F9/5088

    Abstract: A dynamic task management system and method for data parallel processing on a multi-core system are provided. The dynamic task management system may generate a registration signal for a task to be parallel processed, may generate a dynamic management signal used to dynamically manage at least one task, in response to the generated registration signal, and may control the at least one task to be created or cancelled in at least one core in response to the generated dynamic management signal.

    Abstract translation: 提供了一种用于多核系统上数据并行处理的动态任务管理系统和方法。 动态任务管理系统可以生成用于待并行处理的任务的注册信号，可以响应于所生成的注册信号而生成用于动态管理至少一个任务的动态管理信号，并且可以将至少一个任务控制为 响应于所生成的动态管理信号在至少一个核心中创建或取消。

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