公开(公告)号：US20220406829A1

公开(公告)日：2022-12-22

申请号：US17840437

申请日：2022-06-14

Applicant: STMicroelectronics (Crolles 2) SAS

Inventor： Maurin DOUIX

IPC: H01L27/146

Abstract: An integrated sensor includes a substrate made of a first semiconductor material having a first optical refractive index. The substrate includes a pixel array, wherein each pixel has a photosensitive active zone formed by an index contrast zone including a matrix of the first semiconductor material and a periodic structure embedded in the matrix. The periodic structure extends from the backside of the substrate and has a two-dimensional periodicity in a parallel plane with the backside. A value of the periodicity is linked with the wavelength of the optical signal and with the first refractive index. Elements of the periodic structure are formed of a second optically transparent material having a second refractive index less than the first refractive index. These elements are positioned at locations defined by the periodicity except for at one location defining a region, preferably central, that is devoid of a corresponding one of the elements.

公开(公告)号：US20220384721A1

公开(公告)日：2022-12-01

申请号：US17751190

申请日：2022-05-23

Applicant: STMicroelectronics (Crolles 2) SAS

Inventor： Pascal GOURAUD ,  Laurent FAVENNEC

IPC: H01L45/00 ,  H01L27/24

Abstract: A memory cell is manufactured by: (a) forming a stack comprising a first layer made of a phase change material and a second layer made of a conductive material; (b) forming a mask on the stack covering only the memory cell location; and (c) etching portions of the stack not covered by the first mask. The formation of the mask covering only the memory cell location comprises defining a first mask extending in a row direction for each row of memory cell locations and then patterning the first mask in a column direction for each column of memory cell locations.

公开(公告)号：US20220336736A1

公开(公告)日：2022-10-20

申请号：US17856711

申请日：2022-07-01

Applicant: STMicroelectronics (Crolles 2) SAS ,  STMICROELECTRONICS (ROUSSET) SAS

Inventor： Philippe BOIVIN ,  Daniel BENOIT ,  Remy BERTHELON

IPC: H01L45/00 ,  H01L27/24

Abstract: The present disclosure concerns a phase-change memory manufacturing method and a phase-change memory device. The method includes forming a first insulating layer in cavities located vertically in line with strips of phase-change material, and anisotropically etching the portions of the first insulating layer located at the bottom of the cavities; and a phase-change memory device including a first insulating layer against lateral walls of cavities located vertically in line with strips of phase-change material.

公开(公告)号：US20220308190A1

公开(公告)日：2022-09-29

申请号：US17704481

申请日：2022-03-25

Applicant: STMicroelectronics (Crolles 2) SAS

Inventor： Matteo Maria VIGNETTI ,  Pierre MALINGE

IPC: G01S7/4865

Abstract: An indirect time-of-flight (iTOF) includes a pixel with a photoconversion area, a readout circuit and at least two circuit sets. Each circuit set includes: a capacitive element connected to a first node of the circuit set; a controllable charge transfer device connected between a first electrode of the photoconversion area and the first node; and a first transistor having a gate connected to the first node, a source connected to the readout circuit and a drain configured to receive a bias potential. The capacitive element is configured to store a voltage in response to charges generated by the photoconversion area.

公开(公告)号：US20220272291A1

公开(公告)日：2022-08-25

申请号：US17667485

申请日：2022-02-08

Applicant: STMicroelectronics SA ,  STMicroelectronics (Grenoble 2) SAS ,  STMicroelectronics (Crolles 2) SAS

Inventor： Celine Mas ,  Matteo Maria Vignetti ,  Francois Agut

IPC: H04N5/369 ,  H04N5/378

Abstract: The present description describes an image sensor including an array of pixels arranged inside and on top of a region of a semiconductor substrate electrically insulated from the rest of the substrate by insulating trenches crossing the substrate, each pixel including a photoconversion area and at least two assemblies, each including a memory area and a transfer gate coupling the memory area to the photoconversion area, and a circuit configured to apply, for each pixel and at least during each integration phase, a bias voltage different from ground to a portion of the substrate having the pixel arranged inside and on top of it.

公开(公告)号：US11387195B2

公开(公告)日：2022-07-12

申请号：US17130683

申请日：2020-12-22

Applicant: STMicroelectronics (Crolles 2) SAS

Inventor： Sebastien Petitdidier

IPC: H01L23/00 ,  H01L23/48 ,  G06F21/87 ,  H01L23/522

Abstract: An electronic chip includes a substrate made of semiconductor material. Conductive pads are located on a front side of the substrate and cavities extend into the substrate from a backside of the substrate. Each cavity reaches an associated conductive pad. Protrusions are disposed on the backside of the substrate. A conductive layer covers the walls and bottoms of the cavities. The conductive layer includes portions on the backside, each portion partially located on an associated protrusion and electrically connecting two of the conductive pads.

公开(公告)号：US11378827B2

公开(公告)日：2022-07-05

申请号：US17083525

申请日：2020-10-29

Applicant: STMicroelectronics (Crolles 2) SAS

Inventor： Stephane Monfray ,  Frédéric Boeuf

IPC: G02F1/035 ,  G02F1/025 ,  H01L29/66

Abstract: A photonic device includes a first region having a first doping type, and a second region having a second doping type, where the first region and the second region contact to form a vertical PN junction. The first region includes a silicon germanium (SiGe) region having a gradual germanium concentration.

公开(公告)号：US20220199632A1

公开(公告)日：2022-06-23

申请号：US17540029

申请日：2021-12-01

Applicant: STMicroelectronics (Crolles 2) SAS ,  STMicroelectronics (Rousset) SAS

Inventor： Abderrezak Marzaki ,  Mathieu Lisart ,  Benoit Froment

IPC: H01L27/112

Abstract: The present description concerns a ROM including at least one first rewritable memory cell.

公开(公告)号：US20220190140A1

公开(公告)日：2022-06-16

申请号：US17685780

申请日：2022-03-03

Applicant: STMicroelectronics (Crolles 2) SAS ,  STMicroelectronics SA

Inventor： Alexis GAUTHIER ,  Pascal CHEVALIER

IPC: H01L29/66 ,  H01L29/06 ,  H01L29/08 ,  H01L29/732

Abstract: A bipolar transistor includes a collector. The collector is formed by: a first portion of the collector which extends under an insulating trench, and a second portion of the collector which crosses through the insulating trench. The first and second portions of the collector are in physical contact.

公开(公告)号：US20220181390A1

公开(公告)日：2022-06-09

申请号：US17543004

申请日：2021-12-06

Applicant: STMicroelectronics (Crolles 2) SAS

Inventor： Thierry BERGER ,  Stephane ALLEGRET-MARET

IPC: H01L27/30 ,  H01L51/42 ,  H01L51/44

Abstract: A pixel includes a first electrode layer on an exposed surface of an interconnection structure and in contact with a conductive element of the interconnection structure. An insulating layer extends over the first electrode layer and includes opening crossing through the insulating layer to the first electrode layer. A second electrode layer is on top of and in contact with the first electrode layer and the insulating layer in the opening. A film configured to convert photons into electron-hole pairs is on the insulating layer, the second electrode layer and filling the opening. A third electrode layer covers the film.