Abstract:
A method and system are provided for flexible mapping of AV vs. Record channels in a programmable transport demultiplexer/PVR engine. The method may involve processing a portion of an incoming packet, which may result in a partially processed packet. The preprocessing may comprise extracting information from the packet to configure parameters associated with the packet and storing the configured parameters in memory. The configured parameters may be based on the type of the packet, AV v. Record, and used to configure the channels used to transport the packets to decoders and Record engines, respectively. The number of channels used for AV data and the number of channels used for Record data may vary depending on the needs of the system.
Abstract:
Presented herein are method(s) and apparatus for demultiplexing, merging, and duplicating packetized elementary stream/program stream/elementary stream data. In one embodiment, there is presented a method for processing data. The method comprises receiving a bitstream wherein said bitstream comprises a plurality of streams; mapping the plurality of streams to a plurality of identifiers; packetizing the plurality of streams, thereby resulting in a plurality of packets, and wherein each packet further comprises: a portion of only one of the plurality of streams; and a particular one of the identifiers, wherein the particular one of the identifiers is mapped to the only one of the plurality of streams.
Abstract:
A method and system are provided for architecture of a very fast programmable transport demultiplexer using a double-buffered approach. The method may involve utilizing a hardware assist block to process incoming packets, retrieve information about the packets, and write the retrieved information to a memory block. A firmware block may then utilize the information in memory to perform further processing on the packet data. The firmware and hardware assist blocks may work simultaneously so as to speed up the processing of the packet, which can comprise record data and/or audio/video data. The system may comprise the hardware assist block, the firmware assist block, and a memory block.
Abstract:
Methods and systems for preventing revocation denial of service attacks are disclosed and may include receiving and decrypting a command for revoking a secure key utilizing a hidden key, and revoking the secure key upon successful verification of a signature. The command may comprise a key ID that is unique to a specific set-top box. A key corresponding to the command for revoking the secure key may be stored in a one-time programmable memory, compared to a reference, and the security key may be revoked based on the comparison. The command for revoking the secure key may be parsed from a transport stream utilizing a hardware parser. The method and system may also comprise generating a command for revoking a secure key. The command may be encrypted and signed utilizing a hidden key and may comprise a key ID that is unique to a specific set-top box.
Abstract:
A home gateway may be used to handle at least a portion of processing of content obtained for consumption by client devices serviced via the home gateway. The home gateway may receive a single copy of content having a first format, and may convert the received content to one or more other formats suitable for presentation by at least one of the client devices based on knowledge of the client devices. The home gateway may maintain secure and/or protected access of the content handled via the home gateway. During protected access the home gateway may partition the content into a plurality of encrypted segments that are forwarded separately to the client devices. The client devices may utilize a corresponding plurality of encryption keys for decrypting the encrypted segments. The encryption keys may be obtained from an external key server. The home gateway may also generate the encryption keys.
Abstract:
A Set Top Box (STB) or client computer includes a communication interface operable to receive digital messages and digital content, memory operable, and processing circuitry coupled to the communication interface and to the memory. The STB is operable to receive a digital message, extract a key portion from the digital message, extract a rights portion from the digital message, determine a code version based upon the rights portion, read a stored code version from the memory, and compare the code version to the stored code version to validate the software instructions. Upon an unfavorable comparison of the code version to the stored code version, initiates an error action that may include sending a message to a service provider device for software instruction reloading, rebooting, and/or disable decryption of the digital content. Extracting the rights portion from the digital message may include decrypting the key portion to produce a decrypted result and decrypting the rights portion using the decrypted result to produce the decrypted rights portion.
Abstract:
Securely loading code in a security processor may include autonomous fetching an encrypted security data set, which may comprise security code and/or root keys, by a security processor integrated within a chip. The encrypted security data set may be decrypted via the on-chip security processor and the decrypted code set may be validated on-chip using an on-chip locked value. The on-chip locked value may be stored in a one-time programmable read-only memory (OTP ROM) and may include security information generated by applying one or more security algorithms, for example SHA-based algorithms, to the security data set. The encryption of the security data set may utilize various security algorithms, for example AES-based algorithms. The on-chip locked value may be created and locked after a virgin boot of a device that includes the security processor. The security data set may be authenticated during the virgin boot of the device.
Abstract:
A stored predefined unmodifiable bootable code set may be verified during code reprogramming of a device, and executed as a first stage of code reprogramming of the device. The predefined unmodifiable bootable code set may be stored in a locked memory such as a locked flash memory and may comprise code that enables minimal communication functionality of the device. The predefined unmodifiable bootable code set may be verified using a security algorithm, for example, a SHA-based algorithm. Information necessary for the security algorithm may be stored in a memory, for example, a one-time programmable read-only memory (OTP ROM). The stored information necessary for the security algorithm may comprise a SHA digest, a signature, and/or a key. A second stage code set may be verified and executed during the code reprogramming of the device subsequent to the verification of the stored predefined unmodifiable bootable code set.
Abstract:
Aspects of a method and system for memory attack protection to achieve a secure interface are provided. An integrated memory within a slave device may be configured into a plurality of memory portions or regions by commands from a host device. The memory regions may be utilized during operations associated with authentication of subsequent commands from the host device. A first memory region may enable storage of encrypted host commands and data. A second region may enable storage of decrypted host commands and data. A third region may enable storage of internal variables and/or intermediate results from operations performed by the slave device. Another region may comprise internal registers that enable storage of information only accessible to the slave device. Access to some of the memory regions may be controlled by a bus controller and/or a memory interface integrated within the slave device.
Abstract:
A boot code may be segmented to allow separate and independent storage of the code segments in a manner that may enable secure system boot by autonomous fetching and assembling of the boot code by a security sub-system. The code fetching may need to be done without the main CPU running on the chip for security reasons. Because the boot code may be stored in memory devices that require special software application to account for non-contiguous storage of data and/or code, for example a NAND flash memory which would require such an application as Bad Block Management, code segments stored in areas guaranteed to be usable may enable loading remaining segment separately and independently. Each of the code segments may be validated, wherein validation of the code segments may comprise use of hardware-based signatures.