公开(公告)号：US20060033156A1

公开(公告)日：2006-02-16

申请号：US10919916

申请日：2004-08-16

Applicant: Chih-Feng Huang ,  Ta-yung Yang ,  Jenn-yu Lin ,  Tuo-Hsin Chien

Inventor： Chih-Feng Huang ,  Ta-yung Yang ,  Jenn-yu Lin ,  Tuo-Hsin Chien

IPC: H01L29/76

CPC classification number: H01L29/7816 ,  H01L29/0634 ,  H01L29/0692 ,  H01L29/0696 ,  H01L29/0886 ,  H01L29/42368

Abstract: A high voltage LDMOS transistor according to the present invention includes at least one P-field block in the extended drain region of the N-well. The P-field blocks form junction-fields in the N-well for equalizing the capacitance of parasitic capacitors between the drain region and the source region and fully deplete the drift region before breakdown occurs. A higher breakdown voltage is therefore achieved and the N-well having a higher doping density is thus allowed. The source region and P-field blocks enclose the drain region, which makes the LDMOS transistor self-isolated.

公开(公告)号：US20050227430A1

公开(公告)日：2005-10-13

申请号：US10823238

申请日：2004-04-12

Applicant: Chih-Feng Huang ,  Tuo-Hsin Chien

Inventor： Chih-Feng Huang ,  Tuo-Hsin Chien

IPC: H01L21/02 ,  H01L21/8238 ,  H01L27/06 ,  H01L27/08

CPC classification number: H01L28/20 ,  H01L27/0629 ,  H01L27/0802

Abstract: A process of forming a high resistance CMOS resistor with a relatively small die size is provided. According to an aspect of the present invention, the process of fabricating a high resistance resistor is a standard CMOS process that does not require any additional masking. An n-well is firstly formed in a p-type silicon substrate. A nitride film is then deposited and patterned to form a patterned mask layer. The patterned mask layer serves as a mask. A p-field region is formed in the n-well to form a CMOS resistor. The CMOS resistor according to the present invention has a resistance of 10 kΩ-20 kΩ per square.

Abstract translation: 提供了形成具有相对小的管芯尺寸的高电阻CMOS电阻器的工艺。 根据本发明的一个方面，制造高电阻电阻器的过程是不需要额外掩蔽的标准CMOS工艺。 首先在p型硅衬底中形成n阱。 然后沉积和图案化氮化物膜以形成图案化掩模层。 图案化掩模层用作掩模。 在n阱中形成p场区以形成CMOS电阻。 根据本发明的CMOS电阻器具有10kOmega-20kOmega每平方的电阻。